Re: MP(G2)

Dear Michael-san,

I am apologize for my mistake.
You are correct regarding the following matter.
I could die of embarrassment.

-----------------------------------------------------------------------
> Regarding the following design flaws
> =E2=94=97 macppc/cpu.c contains OpenPIC machine's CPU setup code and Gran=
d
> Central machine's CPU setup code.
>     However, the Grand Central side of the code cannot be compiled.
>     My patch fails to compile on the OpenPIC side.
>     How can I fix it neatly?

Why do you need this part?

> diff -Naru src.orig/sys/arch/macppc/macppc/cpu.c
> src/sys/arch/macppc/macppc/cpu.c
> --- src.orig/sys/arch/macppc/macppc/cpu.c 2023-08-03
> 08:16:31.000000000 +0000 +++ src/sys/arch/macppc/macppc/cpu.c
> 2026-04-12 00:58:12.958727695 +0000 @@ -70,12 +70,15 @@
>
>  #include "pic_openpic.h"
>  #include "pic_u3_ht.h"
> +#include "pic_ohare.h"
>
> +#ifndef NPIC_OHARE
>  #ifndef OPENPIC
>  #if NPIC_OPENPIC > 0
>  #define OPENPIC
>  #endif /* NOPENPIC > 0 */
>  #endif /* OPENPIC */
> +#endif /* NOOHARE */
>
>  int cpumatch(device_t, cfdata_t, void *);
>  void cpuattach(device_t, device_t, void *);

... I left it out and both GENERIC.MP and and my other openpic-only SMP
kernels build just fine.
-----------------------------------------------------------------------

Thank you for your confirmation.
I will continue investigate based on this approach.

> You're right, the secondary CPUs IPI isn't going to show up in grand
> central's interrupt registers so we can't register a common handler or
> treat it as a (somewhat) normal interrupt like on openpic variants.

Thanks,
--=20
Naruaki Etomi
[email protected]