Re: TLB-miss counter in TLB-miss handler (important proposal).
[email protected] (Michael van Elst)
| Newsgroups | gmane.os.netbsd.ports.mips.devel |
|---|---|
| Organization | Serpens User Group |
| Message-ID | <[email protected]> |
[email protected] ("Naruaki.Etomi") writes: Hi, >Prerequisite: >%hi %lo operator that takes an address as an argument does not work on >mips64 kernel. it works as long as you are in the -2gb..+2gb window. Can you explain why you need to put kernel data/bss outside of that window ? -- -- Michael van Elst Internet: [email protected] "A potential Snark may lurk in every tree."