Re: DECstation 5000/200 timekeeping

Hello,

On Tue, 26 Oct 2021 00:31:10 -0400 (EDT)
Mouse <[email protected]> wrote:

...
> This really looks to me as though the clock interrupt is low enough
> priority to get locked out by SCSI, serial, and/or Ethernet interrupts;
> it reminds me of running NetBSD/mac68k, years ago.  Is that accurate?
> If so, is that an attribute of the hardware, or is it something that
> can be fixed in software?  I'm wondering if it can be fixed or if I'll
> just have to give up on decent timekeeping on this hardware.

Hmm, that's an r4400 or somesuch, isn't it?
Looking at the code, one difference between powerpc's clock.c and mips'
mips3_clockintr.c is that the powerpc code calls hardclock() for every
missed tick, while the mips code calls it once per interrupt.
Timekeeping on both should otherwise depend on the CPU's cycle counter
/ decrementer, which both should take a lot more than a minute to
overflow.

have fun
Michael