Re: DECstation 5000/200 timekeeping
Simon Burge <[email protected]>
| Newsgroups | gmane.os.netbsd.ports.mips.devel |
|---|---|
| Message-ID | <[email protected]> |
"Maciej W. Rozycki" wrote: > On Tue, 26 Oct 2021, Michael wrote: > > > > This really looks to me as though the clock interrupt is low enough > > > priority to get locked out by SCSI, serial, and/or Ethernet interrupts; > > > it reminds me of running NetBSD/mac68k, years ago. Is that accurate? > > > If so, is that an attribute of the hardware, or is it something that > > > can be fixed in software? I'm wondering if it can be fixed or if I'll > > > just have to give up on decent timekeeping on this hardware. > > > > Hmm, that's an r4400 or somesuch, isn't it? > > Looking at the code, one difference between powerpc's clock.c and mips' > > mips3_clockintr.c is that the powerpc code calls hardclock() for every > > missed tick, while the mips code calls it once per interrupt. > > Timekeeping on both should otherwise depend on the CPU's cycle counter > > / decrementer, which both should take a lot more than a minute to > > overflow. > > Umm, the 5000/200 is R3000-based and has no high-precision timer hardware > of any kind available. The only clocking source available is the DS1287 > real-time clock, so the clock resolution is based on the RTC's interrupt > frequency. If an RTC interrupt is lost due to its handling being delayed > by more than the interrupt's interval, then there's no way to recover. It > also means the clock resolution is very coarse. Mouse - what timecounter info is printing during boot? This should give some details on that the kernel is using for a clock source. Also, does "vmstat -i" show anything about missed clock interrupts? We handle that for some clock sources. Both of my 5000/200's fail to power up :( Cheers, Simon.