Re: New MIPS cache code vs. R5k secondary caches...

In message <[email protected]>, you write: 

-> On Fri, Sep 20, 2002 at 07:21:24PM -0400, Rafal Boni wrote:
-> 
->  > Yah, I'm not either.  The Linux code I've seem people toss around does as
->  > if the page invalidate cacheop where actually indexed -- by just walking
->  > from KSEG0 to KSEG0 + sdcache_size and invalidating each page inbetween.
->  > 
->  > Another way to do this may be to simply use the SDcache INDEX STORE TAG
->  > to mark all the cache blocks invalid; this could also be used if we wante
-> d
->  > to invalidate very small regions (ie, << page size).
-> 
-> Honestly, I am kind of surprised that the "page invalidate" isn't in fact
-> an index op as opposed to a hit op.

Actually, looking at the bus transaction in the "Sec. Cache Interface", it
does look that way -- all that's emitted on the bus is the tag, the index
and a write command on the SysCmd bus.

If you have a copy of "See MIPS Run" and can see if it sheds any light on
this quickly, feel free to drop me a line, or I'll see if I can dig it up
when my stuff arrives from storage next week 8-)

--rafal

----
Rafal Boni                                                     [email protected]
  We are all worms.  But I do believe I am a glowworm.  -- Winston Churchill