Re: Accelerating memset/memcpy

Nigel Stephens <[email protected]> Tue, 01 Oct 2002 16:58:50 +0100

Newsgroups	gmane.os.netbsd.ports.mips
Organization	MIPS Technologies (UK)
Message-ID	<[email protected]>

Nigel Stephens wrote:

> In MIPS32 and MIPS64 compliant processors the "pref" instruction with 
> code 30 is defined as "prepare for store" with the following description:

Oh, and I've just checked: the "pref 30" opcode is also implemented on 
the PMC-Sierra RM7000, although sadly not on the RM52xx, apparently.

Nigel