Re: Pegasos and viaide interrupts
Matt Sealey <[email protected]>
| Newsgroups | gmane.os.netbsd.ports.ofppc |
|---|---|
| Message-ID | <[email protected]> |
Frank Wille wrote: > Matt Sealey wrote: > >>> Digging a bit deeper in the viaide driver showed me that it depends on >>> the >>> PCI_INTERFACE register, whether we are in native or compatible mode. >>> Looking >>> at this register showed me the value 0x8f, which means native mode for >>> both >>> channels (bit 0 and 2). >>> [...] >> I'm afraid you will have to taint yourself with GPL code and look at the >> Pegasos platform fix in the latest kernels for the Via IDE stuff. > > I have downloaded the latest Linux sources a few days ago, and it looked to > me as if they just hardcoded interrupt 14 and 15 for Pegasos, and driving it > in compatible (legacy) mode. MorphOS is doing the same, BTW. I should clarify; it's not mainlined yet but it is floating around and should be submitted for .24 or .25. Prepare to be tainted by the GPL: https://bugzilla.redhat.com/attachment.cgi?id=167747 >> You need >> to do a little tweak or two to get it to work in native mode properly. > > So it is meant to work in native mode? That's interesting! Any pointer to the > information we are missing? It does work in native mode, but it's not set up that way. With the small patch above, the class-code is modified such that it reports that it's in native mode. I'm not even sure if this is right anymore.. every time I look at it I wonder what the hell is wrong with Via IDE chips and all the discussions I had with Jeff, Alan and Tejun about it.. The patch above, to me, can't work since the interrupt 15 is taken out of the properties. The comment, therefore, is a load of bullshit :) Ah I dunno. Who knows anymore. At some point someone reworked a patch I was working on, and it allowed libata pata_via to work on Pegasos without too much hassle. >> Remember the OF device tree is broken and reports the wrong interrupts > > Hm. My firmware (1.2) does not report any interrupts at all. Linux also re-reads the PCI interrupt line from each PCI device when it boots (firmware can not be trusted it seems :) -- Matt Sealey <[email protected]> Genesi, Manager, Developer Relations