Re: Delay slots
Andrew Cagney <[email protected]> Tue, 21 Jun 2016 14:17:58 -0400
| Newsgroups | gmane.os.netbsd.ports.pmax,gmane.os.netbsd.ports.mips.devel |
|---|---|
| Message-ID | <CAJeAr6s9VsbvcwpRen3tVfvOaof_7_3jHSODbP9eVUFmnLOvjQ@mail.gmail.com> |
On 21 June 2016 at 01:09, Michael <[email protected]> wrote: >> > If someone could provide a useful list of problematic instructions and >> > mention architectures suffering problems, this could be a good tool. > > Not a generic MIPS problem - sparc has delay slots too, with most jumps > having a bit to cancel the instruction in it. I'm not sure about other > architectures but I guess the reason why they exist don't apply to just > MIPS and SPARC. Wikipedia lists lots of architectures https://en.wikipedia.org/wiki/Delay_slot