(PReP 7248) battable address to align
Makoto Fujiwara <[email protected]> Sat, 05 Jul 2014 19:33:24 +0900
| Newsgroups | gmane.os.netbsd.ports.powerpc,gmane.os.netbsd.ports.prep |
|---|---|
| Message-ID | <yfmwqbshz7v.wl%[email protected]> |
I've got IBM PReP machine, 43P/133 Model 7248 last year, and was playing with various release of NetBSD, mainly with netbooting. The summary is listed on http://www.ki.nu/hardware/prep/index.html I think we have some problems. 1. battable address not aligned to proper address (or strangely requires some alignment). -- this problem are sometimes hidden, happened to be aligned -- 2. kernel is too large to boot. (But my trial using small kernel for mkbootimage does not affect the real kernel in effect, sorry not knowning the mechanism to boot. 3. Interrupt handling of siop and serial console is not properly done at the early stage of boot (if com0 is selected for boot console). The first problem depends on the kernel compiled: The typical symptom is 'cursor is just blinking WITH blackout screen' Or hung just after init is started, for example, after following print. ----- boot-device: sd0 root on sd0a dumps sd0b root file system type: ffs And I believe This existed at least in May, 2013. I have not been playing with the machine almost for a year, but it seems the problem still exists. kiyohara@ investigated and this relates to the address of battable. To know the battable address, you may issue modena@makoto 12:23:04/130908(/export/src-current)% \ src/obj/tooldir.NetBSD-6.1-amd64/bin/powerpc--netbsd-nm \ src/sys/arch/prep/compile/obj/GENERIC/netbsd | \ grep ' B ' | sort | grep -3 battable 00589570 B null_vnodeop_p 00589588 B prep_clock_mk48txx 0058958c B iosrtable 005895cc B battable 0058a5cc B msgbuf_paddr 0058a5d0 B openpic_base 0058a7ec B pckbc_console_attached If the last part of address bits are not x000, I don't believe the kernel to work. Above are bad (not to work) example. Attached patch will set battable address to xxx0 0000. My obserbation may be totally wrong, I'm far to be an expert. Please correct if wrong. Thanks a lot, Index: sys/arch/powerpc/oea/oea_machdep.c =================================================================== RCS file: /cvs/cvsroot/src/sys/arch/powerpc/oea/oea_machdep.c,v retrieving revision 1.71 diff -u -u -r1.71 oea_machdep.c --- sys/arch/powerpc/oea/oea_machdep.c 24 Mar 2014 19:29:59 -0000 1.71 +++ sys/arch/powerpc/oea/oea_machdep.c 5 Jul 2014 06:18:24 -0000 @@ -96,6 +96,10 @@ */ static void trap0(void *); +/* to align struct battable in 0 0000, suggested by kiyohara@ */ +__asm ( " .section .bss\n" + " .align 5\n"); + /* XXXSL: The battable is not initialized to non-zero for PPC_OEA64 and PPC_OEA64_BRIDGE */ struct bat battable[BAT_VA2IDX(0xffffffff)+1]; # I guess for this requirement comes from powerpc/trap_subr.S, # which truncate lower 3 bits. modena@makoto 15:48:43/140705(..src-current/src)% cvs annotate sys/arch/powerpc/oea/genassym.cf | grep -3 BAT_ADDR_SHIFT Annotations for sys/arch/powerpc/oea/genassym.cf *************** 1.23 (matt 18-Jun-11): define OEACPU_HIGHSPRG OEACPU_HIGHSPRG 1.23 (matt 18-Jun-11): define OEACPU_ALTIVEC OEACPU_ALTIVEC 1.1 (matt 03-Feb-03): 1.26 (matt 01-Feb-12): define BAT_ADDR_SHIFT ilog2(BAT_IDX2VA(1)) 1.26 (matt 01-Feb-12): 1.25 (matt 20-Jun-11): define PTE_REF PTE_REF 1.25 (matt 20-Jun-11): define PTE_CHG PTE_CHG modena@makoto 15:49:10/140705(..src-current/src)% cvs annotate sys/arch/powerpc/powerpc/trap_subr.S | grep -3 BAT_ADDR_SHIFT Annotations for sys/arch/powerpc/powerpc/trap_subr.S *************** 1.42 (matt 31-Jul-03): mtsprg2 %r30 /* in SPRG2 */ 1.69 (matt 05-Jun-11): bt MSR_PR,1f /* branch if PSL_PR is set */ 1.42 (matt 31-Jul-03): mfdar %r31 /* get fault address */ 1.73 (matt 01-Feb-12): rlwinm %r31,%r31,3+(32-BAT_ADDR_SHIFT),BAT_ADDR_SHIFT-3,28 1.73 (matt 01-Feb-12): /* get segment * 8 */ 1.1 (thorpej 16-Nov-00): 1.1 (thorpej 16-Nov-00): /* get batu */ modena@makoto 15:49:38/140705(..src-current/src)% --- Makoto Fujiwara, Chiba, Japan, Narita Airport and Disneyland prefecture.