Re: NetBSD 8.10 does not boot on 7043-140
Alan Perry <[email protected]> Mon, 1 Jul 2019 11:54:22 -0700
| Newsgroups | gmane.os.netbsd.ports.prep |
|---|---|
| Message-ID | <[email protected]> |
Cool.
Will it install on it? I don't have the 7043-140 anymore, but I know the
guy who has it and I am sure that I can convince him to install NetBSD
on it.
alan
On 7/1/19 10:49 AM, Ulrich Teichert wrote:
> Hi,
>
> success at last!! My 43p boots NetBSD 8.0:
>
> ----------------boot log start-----------------------------------
> [del]
> RS/6000 RS/6000 RS/6000 RS/6000 RS/6000 RS/6000 RS/6000 RS/6000 RS/6000 RS/6000
>
> memory keyboard network scsi speaker ok
> 0 > boot net
> LOAD: Waiting 60 seconds for Spanning Tree
> BOOTP R = 1 BOOTP S = 1
> FILE: sysinst_com0.fs
> Load Addr=0x600000 Max Size=0x10000000
> Packet Count = 100 [del] Packet Count = 4000 FINAL Packet Count = 4020
> Final File Size = 2057946 bytes.
>
>
>
>>> NetBSD/prep BOOT, Revision 1.9 (Sun Jun 30 19:35:28 UTC 2019)
> AFTER siop_init
> XXXXX Trying to boot in()
>
> Boot:
> Loading in()
> No such device - Configured devices are:
> sd
> in memory kernel
> [del]
> start=0x100000
>
> Serial console init done
> Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
> 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015, 2016, 2017,
> 2018 The NetBSD Foundation, Inc. All rights reserved.
> Copyright (c) 1982, 1986, 1989, 1991, 1993
> The Regents of the University of California. All rights reserved.
>
> NetBSD 8.0 (INSTALL) #27: Sun Jun 30 21:50:13 CEST 2019
> ut@valdese:/home/ut/soft/netbsd/prep/usr/src/sys/arch/prep/compile/obj/INSTALL
> Model: IBM Model 7042/7043 (ED)
> total memory = 512 MB
> avail memory = 493 MB
> prep_init
> OpenPIC Version 1.1: Supports 4 CPUs and 16 interrupt sources.
> platform: platform_quirk: -1
> mainbus0 (root)
> cpu0 at mainbus0: 604e (Revision 2.3), ID 0 (primary)
> cpu0: HID0 0xc084<ICE,DCE,SGE,BHT>, powersave: 1
> cpu0: 200.00 MHz
> pnpbus0 at mainbus0
> mcclock0 at pnpbus0: port 0x70-0x71, irq 8: mc146818 compatible time-of-day clock
> nvram0 at pnpbus0: port 0x74-0x75 0x76
> pci0 at mainbus0 bus 0: indirect configuration space access
> pchb0 at pci0 dev 0 function 0
> pchb0: vendor 1057 product 0002 (rev. 0x30)
> pchb0: L2 cache: 1M, internally controlled write-back mode
> pcib0 at pci0 dev 11 function 0: vendor 1014 product 000a (rev. 0x03)
> pcn0 at pci0 dev 12 function 0: AMD PCnet-PCI Ethernet
> pcn0: Am79c970A PCnet-PCI II rev 6, Ethernet address 00:06:29:2e:98:9d
> pcn0: interrupting at irq 22
> pcn0: 10base5, 10base5-FDX, 10baseT, 10baseT-FDX, auto, auto-FDX
> vendor 1014 product 0046 (undefined, subclass 0x00) at pci0 dev 13 function 0 not configured
> siop0 at pci0 dev 16 function 0: Symbios Logic 53c825a (fast wide scsi)
> siop0: using on-board RAM
> siop0: interrupting at irq 23
> scsibus0 at siop0: 16 targets, 8 luns per target
> vendor 1014 product 0054 (miscellaneous display, revision 0x01) at pci0 dev 18 function 0 not configured
> ppb0 at pci0 dev 23 function 0: vendor 1014 product 0022 (rev. 0x01)
> pci1 at ppb0 bus 1
> isa0 at pcib0
> com0 at isa0 port 0x3f8-0x3ff irq 4: ns16550a, working fifo
> com0: console
> com1 at isa0 port 0x2f8-0x2ff irq 3: ns16550a, working fifo
> pckbc0 at isa0 port 0x60-0x64
> vmmask 30000000 schedmask 30000000 highmask 7c000000
> scsibus0: waiting 2 seconds for devices to settle...
> cd0 at scsibus0 target 3 lun 0: <IBM, CDRM00203\000\000\000\000\000!K, 8B08> cdrom removable
> cd0: sync (100.00ns offset 8), 8-bit (10.000MB/s) transfers
> sd0 at scsibus0 target 10 lun 0: <IBM, DCHS04U, 6363> disk fixed
> sd0: 4303 MB, 6077 cyl, 9 head, 161 sec, 512 bytes/sect x 8813870 sectors
> sd0: sync (100.00ns offset 8), 16-bit (20.000MB/s) transfers, tagged queueing
> boot device: pcn0
> root on md0a dumps on md0b
> root file system type: ffs
> kern.module.path=/stand/prep/8.0/modules
> erase ^H, werase ^W, kill ^U, intr ^C, status ^T
> Terminal type? [vt100] vt220
> ----------------boot log end-----------------------------------
>
> And in the end it was *that* easy:
>
> ===================================================================
> RCS file: /cvsroot/src/sys/arch/prep/stand/boot/boot.c,v
> retrieving revision 1.20
> diff -u -r1.20 boot.c
> --- boot.c 8 Aug 2014 19:45:48 -0000 1.20
> +++ boot.c 1 Jul 2019 17:27:57 -0000
> @@ -46,8 +46,8 @@
> #include "sdvar.h"
>
> char *names[] = {
> - "sd(0,0,0)netbsd", "sd(0,0,0)onetbsd",
> "in()",
> + "sd(0,0,0)netbsd", "sd(0,0,0)onetbsd",
> };
> #define NUMNAMES (sizeof (names) / sizeof (names[0]))
>
> @@ -145,7 +145,8 @@
> /*
> * Initialize siop@pci0 dev 16 func 0
> */
> - siop_init(0, 16, 0);
> + //siop_init(0, 16, 0);
> + printf("AFTER siop_init\n");
>
> for (;;) {
> name = names[n++];
>
> Turned out that the siop code was experimental in boot and just
> commenting it out fixed it - at least for my 43p. Love to hear what
> my simple patch does for other old prep boxes out there, I'll clean
> it up and add some comments before properly submitting it, promise ;-)
>
> HTH,
> Uli