Re: panic at boot on 4/200

On Sat, 10 Jan 2026 at 03:16, foo bar <[email protected]> wrote:
>
> On Thu, Jan 8, 2026 at 2:25 AM Romain Dolbeau <[email protected]> wrote:
>
> > When you say "everything else", did that include trying NetBSD-2.0 to
> > narrow down the issue ?
> > From the release note, 2.0 introduced SMP on SPARC, which /may/ have
> > involved reworking the cache support a bit (for e.g. coherency).
> > (Shot in the dark, and  4.1.1 was also pre-SMP support...).
>
> From memory I tried 1.5.1, 1.5.3, 2.0, 4.0, 6.0, 8.0, 9.0, and
> current. I'll retest everything when I get back to the board.

So based on the hypothesis we would expect 1.6.2 to be the last version to work

> > Alternatively to support your hypothesis, maybe it's possible to run a
> > newer NetBSD kernel patched and recompiled to not enable the cache?
>
> That could work and it would probably be easier than trying to figure
> out which of the 32 chips is bad.

Should be able to do that by adjusting getcacheinfo_sun4() to treat a
4/200 the same as a 4/100
https://nxr.netbsd.org/xref/src/sys/arch/sparc/sparc/cpu.c#1169

If that works it might be interesting to try enabling just a small
part of the start of the cache and see if it works (and if there is
any discernible speedup :)

Good hunting!

David