EXA requirements (was: Re: Improved memory detection for cgsix)
Romain Dolbeau <[email protected]>
| Newsgroups | gmane.os.netbsd.ports.sparc |
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| Message-ID | <CADuzgbrd=9ALkqjpvYbF0ibDenzSMyDP6hFuYXSNA=QTJsx+WA@mail.gmail.com> |
Le jeu. 3 mars 2022 à 19:26, Michael <[email protected]> a écrit : > EXA more or less depends on being able to address VRAM by offset + > coordinates with arbitrary pitch, so off-screen pixmaps can be neatly > treated as simple memory ranges. Fully arbitrary, or can it work with some required level of roundings? Unaligned accesses are problematic for most HW. So a stride of 16x8-bits pixels or 4x32-bits pixels (or integer multiple of) is easy to implement with a 128-bits memory controller, but 15x8 or 17x8 or 3x32 aren't. I'm thinking of ways to implement a vector engine that could do arbitrary copy, but it's not easy. (the VexRiscv core I currently use can do arbitrary 32-bits, but that versatility comes at a cost in terms of performance, so I want to address the memory controller directly). > If your hw can't do that, off-screen memory is mostly a cache for > frequently used pixmaps. Well that's the benefit of rolling your own hardware in a FPGA - you can adapt it to the needed requirements :-) Thanks & cordially, -- Romain Dolbeau