Re: Sun4/110 "Panic: Crazy Interrupts"
Julian Coleman <[email protected]>
| Newsgroups | gmane.os.netbsd.ports.sparc |
|---|---|
| Message-ID | <ZiJ8QRQ6O4J1u2d6@morava> |
Hi, > I commented out that block and compiled again - I had to add > -Wno-unused to the generated Makefile to get it to build since it > didn't like 'bt' and 'i' hanging around unused. > > It looks like the stray interrupts still happen, and we still panic in > that further along spot from before. So I assume we'd just disable > these interrupts? I wondered if that might happen. Looking at the P4 register definitions: https://nxr.netbsd.org/xref/src/sys/dev/sun/pfourreg.h there is PFOUR_REG_INTEN, so I wonder if this is set and we can clear it on attach. I've attached a patch that tries to adjust the FBC DAC registers to be a mix of char and int, plus unset the interrupt enable bit in the P4 reg. I assume that because we pass a shift of 24 to BT_INIT in the old code that we want to access bt_addr[3] and bt_ctrl[3]. I hope that this will work, otherwise we'll need to think of something else. There is also an interrupt enable register in the FBC control register: https://nxr.netbsd.org/xref/src/sys/dev/sun/btreg.h#118 so we might need to also disable that, but I didn't do that in the patch (we should be able to access it via &sc->sc_fbc->fbc_ctrl). Regards, Julian --
cgfour.diff
(text/x-diff, 1.7 KB)
Index: sys/arch/sparc/dev/cgfour.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc/dev/cgfour.c,v
retrieving revision 1.50
diff -u -r1.50 cgfour.c
--- sys/arch/sparc/dev/cgfour.c 18 Oct 2014 08:33:26 -0000 1.50
+++ sys/arch/sparc/dev/cgfour.c 19 Apr 2024 14:01:49 -0000
@@ -124,12 +124,35 @@
#include <dev/sun/pfourreg.h>
/* per-display variables */
+struct p4bt_regs {
+ u_char bt_addr[4];
+ u_int bt_cmap;
+ u_char bt_ctrl[4];
+ u_int bt_omap;
+};
+#define P4BT_INIT(bt) do { \
+ (bt)->bt_addr[3] = 0x06; /* command reg */ \
+ (bt)->bt_ctrl[3] = 0x73; /* overlay plane */ \
+ (bt)->bt_addr[3] = 0x04; /* read mask */ \
+ (bt)->bt_ctrl[3] = 0xff; /* color planes */ \
+} while(0)
+
+
+struct p4fbcontrol {
+ struct p4bt_regs fbc_dac;
+ u_char fbc_ctrl;
+ u_char fbc_status;
+ u_char fbc_cursor_start;
+ u_char fbc_cursor_end;
+ u_char fbc_vcontrol[12]; /* 12 bytes of video timing goo */
+};
+
struct cgfour_softc {
struct fbdevice sc_fb; /* frame buffer device */
bus_space_tag_t sc_bustag;
bus_addr_t sc_paddr; /* phys address for device mmap() */
- volatile struct fbcontrol *sc_fbc; /* Brooktree registers */
+ volatile struct p4fbcontrol *sc_fbc; /* Brooktree registers */
union bt_cmap sc_cmap; /* Brooktree color map */
};
@@ -305,7 +328,7 @@
for (i = 0; i < 256 * 3 / 4; i++)
((char *)&sc->sc_cmap)[i] = bt->bt_cmap >> 24;
- BT_INIT(bt, 24);
+ P4BT_INIT(bt);
#if 0 /* See above. */
if (isconsole) {
@@ -317,6 +340,10 @@
#endif /* 0 */
printf("\n");
+ /* Disable interrupts */
+printf("P4 register = 0x%04x\n", fb->fb_pfour);
+ fb->fb_pfour &= ~(PFOUR_REG_INTEN);
+
/*
* Even though we're not using rconsole, we'd still like
* to notice if we're the console framebuffer.