Re: Sun4/110 "Panic: Crazy Interrupts"
Julian Coleman <[email protected]>
| Newsgroups | gmane.os.netbsd.ports.sparc |
|---|---|
| Message-ID | <[email protected]> |
Hi, > I got some time to test this patch out - it looks like we panic at line 327: > ``` > bt->bt_addr[3] = 0; > ``` > > And here's what it reads out on the screen: > ``` > cpu0: data fault: pc=0xf0012290 addr=0xfe048003 ser=0x8020<WRITE,TIMEOUT> > panic: kernel fault > ``` I was guessing which addresses we need to write to for the various registers and it seems that I was wrong here. I'm assuming that we get the timeout because there is nothing mapped here on the CG4. In the attached patch I've changed all the instances from bt_addr[3] to bt_addr[0] also moved the lines which check the P4 register and disable interrupts to before the colourmap setup. You should see a line printed with "P4 register = 0x....". Does it have bit 2 set? (https://nxr.netbsd.org/xref/src/sys/dev/sun/pfourreg.h#78) If it crashes in the colourmap code and the P4 register had bit 2 set, it might be worth just commenting out the cmap changes to see if it will get any further. Regards, Julian PS. I used to have a CG4 in my 3/80, so I looked at the sun3 code to see if we do something different there. The notes in sun3 cg4match code mention a type A CG4 with an AMD DAC found in the 3/110: https://nxr.netbsd.org/xref/src/sys/arch/sun3/dev/cg4.c#167 I wonder if your 4/110 has the type A CG4 as well, which might explain why the sparc CG4 driver isn't working.
cgfour.diff
(text/plain, 3.1 KB)
--- sys/arch/sparc/dev/cgfour.c.orig 2024-04-18 14:30:13.838093938 +0200
+++ sys/arch/sparc/dev/cgfour.c 2024-04-26 07:07:29.573658460 +0200
@@ -123,12 +123,35 @@
#include <dev/sun/pfourreg.h>
/* per-display variables */
+struct p4bt_regs {
+ u_char bt_addr[4];
+ u_int bt_cmap;
+ u_char bt_ctrl[4];
+ u_int bt_omap;
+};
+#define P4BT_INIT(bt) do { \
+ (bt)->bt_addr[0] = 0x06; /* command reg */ \
+ (bt)->bt_ctrl[0] = 0x73; /* overlay plane */ \
+ (bt)->bt_addr[0] = 0x04; /* read mask */ \
+ (bt)->bt_ctrl[0] = 0xff; /* color planes */ \
+} while(0)
+
+
+struct p4fbcontrol {
+ struct p4bt_regs fbc_dac;
+ u_char fbc_ctrl;
+ u_char fbc_status;
+ u_char fbc_cursor_start;
+ u_char fbc_cursor_end;
+ u_char fbc_vcontrol[12]; /* 12 bytes of video timing goo */
+};
+
struct cgfour_softc {
struct fbdevice sc_fb; /* frame buffer device */
bus_space_tag_t sc_bustag;
bus_addr_t sc_paddr; /* phys address for device mmap() */
- volatile struct fbcontrol *sc_fbc; /* Brooktree registers */
+ volatile struct p4fbcontrol *sc_fbc; /* Brooktree registers */
union bt_cmap sc_cmap; /* Brooktree color map */
};
@@ -216,7 +239,7 @@
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba = &uoba->uoba_oba4;
bus_space_handle_t bh;
- volatile struct bt_regs *bt;
+ volatile struct p4bt_regs *bt;
struct fbdevice *fb = &sc->sc_fb;
int ramsize, i, isconsole;
@@ -283,38 +306,42 @@
/* XXX this is kind of a waste */
fb->fb_pixels = mapiodev(ca->ca_ra.ra_reg,
PFOUR_COLOR_OFF_OVERLAY, ramsize);
- }
+ printf(" (console)\n");
+ } else
#endif
+ printf("\n");
+
+ /* Disable interrupts */
+printf("P4 register = 0x%04ux\n", (unsigned int) fb->fb_pfour);
+ *fb->fb_pfour &= ~(PFOUR_REG_INTEN);
/* Map the Brooktree. */
if (bus_space_map(oba->oba_bustag,
oba->oba_paddr + PFOUR_COLOR_OFF_CMAP,
- sizeof(struct fbcontrol),
+ sizeof(struct p4fbcontrol),
BUS_SPACE_MAP_LINEAR,
&bh) != 0) {
printf("%s: cannot map control registers\n",
device_xname(self));
return;
}
- sc->sc_fbc = (volatile struct fbcontrol *)bh;
+ sc->sc_fbc = (volatile struct p4fbcontrol *)bh;
/* grab initial (current) color map */
bt = &sc->sc_fbc->fbc_dac;
- bt->bt_addr = 0;
+ bt->bt_addr[0] = 0;
for (i = 0; i < 256 * 3 / 4; i++)
((char *)&sc->sc_cmap)[i] = bt->bt_cmap >> 24;
- BT_INIT(bt, 24);
+ P4BT_INIT(bt);
#if 0 /* See above. */
if (isconsole) {
- printf(" (console)\n");
#if defined(RASTERCONSOLE) && 0 /* XXX been told it doesn't work well. */
fbrcons_init(fb);
#endif
- } else
+ }
#endif /* 0 */
- printf("\n");
/*
* Even though we're not using rconsole, we'd still like
@@ -486,14 +513,14 @@
static void
cgfourloadcmap(struct cgfour_softc *sc, int start, int ncolors)
{
- volatile struct bt_regs *bt;
+ volatile struct p4bt_regs *bt;
u_int *ip, i;
int count;
ip = &sc->sc_cmap.cm_chip[BT_D4M3(start)]; /* start/4 * 3 */
count = BT_D4M3(start + ncolors - 1) - BT_D4M3(start) + 3;
bt = &sc->sc_fbc->fbc_dac;
- bt->bt_addr = BT_D4M4(start) << 24;
+ bt->bt_addr[0] = BT_D4M4(start);
while (--count >= 0) {
i = *ip++;
/* hardware that makes one want to pound boards with hammers */