Re: NetBSD/vax vm for github testing

>> It would be relatively easy to add auxiliary CPU support to my
>> MicroVAX-II emulator, but, without any code to run on it, there's
>> little point (and no way to test it).  [...]
> A little curious about that one.  How was memory done[?]  Did you
> just have some shared Qbus memory, and then each CPU had [its] own
> private main memory?

Well, at the moment, the emulator supports only one CPU, which is the
arbiter.  There's a reason I wrote "It would be" rather than "It was".

Memory is represented as an array of bytes, containing physical memory.
Any operation which refers to memory ultimately accesses that array.
Qbus mapping registers are supported, but (of course) affect only
accesses by Qbus devices.

If I were to add support for a second CPU, it would, like an auxiliary
KA630, have its own memory, which it would be capable of exporting to
the Qbus via its own Qbus mapping registers.  (In order to have two
KA630s with reasonable memory complements on a real uV2, you need an
unusual backplane (lots of Q/CD slots) or electrical equivalent.  You
could do two CPUs with reasonable memory if you have a >=15M
single-board memory module; I've never seen one, but there's no reason
one couldn't have been built.  One might even be built now, though AIUI
the bus transceivers are hard to source.)

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