Re: Clock Error

On Tue, Dec 19, 2023 at 05:45:34PM -0500, Mouse wrote:
> >> I wonder if idle detection plays a role...
> > I have idle detection enabled, and it is working.
> 
> Oh, that reminds me: what is it that simh recognizes as an idle loop?
> Someone quoted the code here, but (a) that was a long time ago and I'm
> not sure I can find it easily and (b) it doesn't clearly delinate what
> signals simh versus what is unrelated accident-of-the-implementation
> code.

... and FWIW, this it the hackish patch I made to SIMH 3.12-4 to carry
over the correct IDLE detection code that is part of open-simh (4.1).

===================================================================
RCS file: RCS/vax_cpu1.c,v
retrieving revision 1.1
diff -u -r1.1 vax_cpu1.c
--- vax_cpu1.c  2023/11/22 17:06:15     1.1
+++ vax_cpu1.c  2023/11/22 17:18:34
@@ -76,6 +76,12 @@
 
 #include "vax_defs.h"
 
+#define VAX_IDLE_BSD     0x04
+
+void cpu_idle (void);
+
+extern uint32 cpu_idle_mask;
+
 static const uint8 rcnt[128] = {
  0, 4, 4, 8, 4, 8, 8,12, 4, 8, 8,12, 8,12,12,16,        /* 00 - 0F */
  4, 8, 8,12, 8,12,12,16, 8,12,12,16,12,16,16,20,        /* 10 - 1F */
@@ -1523,6 +1529,10 @@
 
     case MT_IPL:                                        /* IPL */
         PSL = (PSL & ~PSL_IPL) | ((val & PSL_M_IPL) << PSL_V_IPL);
+        if ((VAX_IDLE_BSD & cpu_idle_mask) &&           /* New NetBSD and OpenBSD */
+            (0 != (PC & 0x80000000)) &&                 /* System Space (Not BOOT ROM) */
+            (val == 1))                                 /* IPL 1 */
+            cpu_idle();                                 /* idle loop */
         break;
 
     case MT_ASTLVL:                                     /* ASTLVL */