Re: tco at ichsmb

Taylor R Campbell <[email protected]> writes:

> Currently tco(4) attaches at ichlpcib(4), the Intel I/O platform
> controller hub's low-pin-count interface bridge, d31:f0.
>
> On newer Intel systems, though, the registers are found via the SMBus
> device, d31:f4, with some other bits to twiddle and knobs to turn at
> the PMC device d31:f2 and the hidden P2SB d31:f1.  See, e.g.:
>
> https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/100-series-chipset-datasheet-vol-2.pdf
>
> Linux's driver iTCO_wd and FreeBSD's driver ichwd support this
> configuration, and I'm trying to add it to NetBSD.
>
> With the attached ichsmbtco.patch, I've gotten everything to attach on
> my T480, and if I start wdogctl, I can read out reasonable-looking TCO
> registers.  But it doesn't work: it never fires, and if I read out the
> TCO RLD register, it never counts down.

I am not following all the details, but I have a maybe-helpful maybe-not
datapoint.

I have a wicked old box with an ICH6, bought 2006 or so.  dmesg excerpt:

  cpu0 at mainbus0 apid 0
  cpu0: Intel(R) Pentium(R) 4 CPU 3.40GHz, id 0xf43
  cpu0: package 0, core 0, smt 0
  ichlpcib0 at pci0 dev 31 function 0: vendor 8086 product 2640 (rev. 0x03)
  timecounter: Timecounter "ichlpcib0" frequency 3579545 Hz quality 1000
  ichlpcib0: 24-bit timer
  tco0 at ichlpcib0: TCO (watchdog) timer configured.
  tco0: Min/Max interval 1/367 seconds
  piixide0 at pci0 dev 31 function 1: Intel 82801FB IDE Controller (ICH6) (rev. 0x03)
  piixide0: bus-master DMA support present
  piixide0: primary channel configured to compatibility mode
  piixide0: primary channel interrupting at ioapic0 pin 14

Under NetBSD 5 i386, the watchdog worked (but it appeared as ichlcib0 or
something instead).  Under NetBSD 9 i386, it appears to work but does
not fire.  I have not tried amd64, or 6/7/8/proto10.

Figuring this out is on the part of my todo list I don't really expect
to get to, but maybe we'll have a long snowy winter.

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