Re: ThinkPad x13gen5 inteldrm0 support/issue

On Tue Apr 14, 2026 at 09:28:24PM +1000, Jonathan Gray wrote:
> On Tue, Apr 14, 2026 at 04:57:45PM +1000, Jonathan Gray wrote:
> > On Fri, Apr 03, 2026 at 09:15:51AM +0200, Rafael Sadowski wrote:
> > > As an alternative to my AMD T14, I have an Intel X13 Gen 5 here.
> > > Unfortunately, the DRM isn't working. Is this a bug, or do we not
> > > support this GPU?
> > > 
> > > drm:pid0:ct_send *ERROR* [drm] *ERROR* GT0: GUC: CT: No response for request 0x550a (fence 7)
> > > drm:pid0:intel_guc_ct_send *ERROR* [drm] *ERROR* GT0: GUC: CT: Sending action 0x550a failed (0xffffffffffffffc4e) status=0
> > > drm:pid0:guc_init_engine_stats *ERROR* [drm] *ERROR* GT0: GUC: Failed to enable usage stats: 0xffffffffffffffc4e
> > > drm:pid0:__uc_init_hw *ERROR* [drm] *ERROR* GT0: GuC initialization failed 0xffffffffffffffc4e
> > > drm:pid0:intel_gt_init_hw *ERROR* [drm] *ERROR* GT0: Enabling uc failed (-5)
> > > drm:pid0:intel_gt_resume *ERROR* [drm] *ERROR* GT0: Failed to initialize GPU, declaring it wedged!
> > > drm:pid0:add_taint_for_CI *NOTICE* [drm] CI tainted: 0x1 by 0xffffffff81561a3bS
> > > inteldrm0: 1920x1200, 32bpp
> > 
> > I have not seen that on T14 Gen 5 Intel recently.
> > 
> > Just the expected
> > drm:pid96554:gsc_work *ERROR* [drm] *ERROR* GT1: GSC proxy handler failed to init
> > as there is no mei driver
> > 
> > GuC TLB invalidation gets sequence numbers with the cyclic xarray
> > interface.  The current code allocates ids from the start of the range
> > instead of resuming where it left of.  Having added a related cyclic
> > function for idr recently, I am curious if this helps:
> 
> something else to try
> 
> When running a non-mp kernel with DRMDEBUG and CONFIG_DRM_I915_DEBUG_GUC
> I encountered the following:
> 
> panic: mtx 0x: locking against myself
> 
> mtx_enter
> intel_guc_tlb_invalidation_done+0x46
> ct_process_request+0x1d7
> ct_try_receive_message+0x5a8
> gen11_gt_irq_handler+0x256
> dg1_irq_handler+0xdb
> intr_handler+0x56
> Xintr_ioapic_edge17_untramp+0x18f
> pool_do_put+0x216
> __xa_erase+0xb8
> guc_send_invalidate_tlb+0x3c8
> guc_ggtt_invalidate+0xe7
> 
> "If you are going to modify the XArray from interrupt or softirq
> context, you need to initialise the array using xa_init_flags(),
> passing XA_FLAGS_LOCK_IRQ or XA_FLAGS_LOCK_BH."
> https://docs.kernel.org/core-api/xarray.html

This diff does not fix my issue.

> 
> Index: sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c,v
> diff -u -p -r1.27 intel_guc_submission.c
> --- sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c	9 Mar 2026 23:58:02 -0000	1.27
> +++ sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c	14 Apr 2026 11:12:19 -0000
> @@ -2108,7 +2108,7 @@ static int init_tlb_lookup(struct intel_
>  	if (!HAS_GUC_TLB_INVALIDATION(guc_to_gt(guc)->i915))
>  		return 0;
>  
> -	xa_init_flags(&guc->tlb_lookup, XA_FLAGS_ALLOC);
> +	xa_init_flags(&guc->tlb_lookup, XA_FLAGS_LOCK_IRQ);
>  
>  	wait = kzalloc(sizeof(*wait), GFP_KERNEL);
>  	if (!wait)
>