Re: amdgpu RX6800 crashes kernel during startx

Petre Rodan <[email protected]> Mon, 15 Jun 2026 07:57:11 +0300
Newsgroups gmane.os.openbsd.bugs
Message-ID <[email protected]>
hello Jonathan.

On Mon, Jun 15, 2026 at 02:09:13PM +1000, Jonathan Gray wrote:
> On Sun, Jun 14, 2026 at 09:52:53PM +0300, Petre Rodan wrote:
> >  9:0:0: ATI Navi 21
> > 	0x0000: Vendor ID: 1002, Product ID: 73bf
> > 	0x0004: Command: 0006, Status: 0010
> > 	0x0008:	Class: 03 Display, Subclass: 00 VGA,
> > 		Interface: 00, Revision: c3
> > 	0x000c: BIST: 00, Header Type: 80, Latency Timer: 00,
> > 		Cache Line Size: 10
> > 	0x0010: BAR mem prefetchable 64bit addr: 0x0000007800000000/0x400000000
> > 	0x0018: BAR mem prefetchable 64bit addr: 0x0000007c00000000/0x10000000
> > 	0x0020: BAR io addr: 0x0000e000/0x0100
> > 	0x0024: BAR mem 32bit addr: 0xfca00000/0x00100000
> 
> framebuffer memory is described by pci bar 0x10
> 
> the window size here is already 16GB, even without resizing the bar
> 
> can you try this diff to force visible vram to 512MB?
> 
> Index: sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c,v
> diff -u -p -r1.20 amdgpu_gmc.c
> --- sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c	25 May 2026 08:56:32 -0000	1.20
> +++ sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c	15 Jun 2026 03:53:34 -0000
> @@ -216,6 +216,8 @@ void amdgpu_gmc_vram_location(struct amd
>  	uint64_t vis_limit = (uint64_t)amdgpu_vis_vram_limit << 20;
>  	uint64_t limit = (uint64_t)amdgpu_vram_limit << 20;
>  
> +	vis_limit = 512ULL << 20;
> +
>  	mc->vram_start = base;
>  	mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;
>  	if (limit < mc->real_vram_size)

great news, with this patch all errors from dmesg went away and got replaced with

amdgpu0: SIENNA_CICHLID GC 10.3.0 60 CU rev 0x01 
amdgpu0: 1920x1080, 32bpp

Xorg loaded the modesetting driver, so xrandr can see both monitors and all resolutions.

if you wish I can try other patches as well if you want to have a cleaned-up implementation for inclusion in the kernel code.

best regards,
peter