Re: iwx 64-bit dma

> From: "Theo de Raadt" <[email protected]>
> Date: Wed, 29 Jul 2026 19:12:17 -0600
> 
> Vitaliy Makkoveev <[email protected]> wrote:
> 
> > On Wed, Jul 29, 2026 at 06:51:49PM -0600, Theo de Raadt wrote:
> > > Vitaliy Makkoveev <[email protected]> wrote:
> > > 
> > > > The IFXF_MBUF_64BIT flag affects only amd64. All other architectures
> > > > still uses memory below 4G. See revision 1.61 of
> > > > sys/arch/amd64/amd64/autoconf.c line 129.
> > > 
> > > I don't see how that matters, that's part of the mechanism for
> > > providing memory to drivers.
> > > 
> > > The diff in question which adds BUS_DMA_64BIT is a declaration to
> > > the higher-level code that _all_ chipsets supported by this driver can
> > > work with 64 bit-addressable memory if the higher levels provide it.
> > > 
> > > If one chipset can't do it, the experience will be terrible.
> > > 
> > > 
> > > 
> > 
> > Well, this means the revision 1.198 of sys/dev/pci/if_iwx.c is wrong and
> > should be reverted.
> 
> No.
> 
> It might answer the question I was asking.

Yes.  I did the research to see if there were any restrictions when
adding the BUS_DMA_64BIT flags to that driver.  Just checking that it
"works" isn't good enough.

That said, this isn't a black-and-white thing.  The DMA engince on
modern hardware often is some standard core (e.g. and ARM core).  Very
few of those have a full 64-bit address bus.  That isn't necessarily a
problem as the CPUs in our systems have similar physical addressing
limits.  A limit of 56 bits or even 48 bits is probably good enough as
all RAM in the system will be well below that limit.  But 36 bits
defenitely isn't and 40 bits might not be enough either.  And we still
see "new" hardware coming out with such limits (looking at you
qwz(4)).  I guess 32-bit CPU cores that support 32-bit or 40-bit
address space extensions (like LPAE on 32-bit ARM) are still in use in
this space.  We could be more specific and introduce additional
BUS_DMA_xxBIT flags to be more precise in this space.

So it should be safe to add the flag to iwx(4).  Whether we should is
a different question.  The flag is a bit of a temporary workaround
that only really matters for systems with lots of network interfaces
that need a lot of mbufs.  Shouldn't be terribly important for your
typical laptop with iwx(4).  The ultimate goal is to remove
restrictions on *all* 64-bit systems and have an IOMMU take care of
address translation such that the hardware only ever sees addresses it
can handle.  And with bounce buffers as a last resort for systems
without a usable IOMMU.