aarch64 curr_el_sp0_irq/_AArch64_Exception_interrupt_nest use Incorrect sp
[email protected] Mon, 28 Oct 2024 11:08:45 +0800
| Newsgroups | gmane.os.rtems.user |
|---|---|
| Message-ID | <OFBBA257EB.D8D764FC-ON48258BC4.0011482A-48258BC4.0011482D@sugon.com> |
--===============2981437180978567400== Content-Transfer-Encoding: quoted-printable Content-Type: text/html; charset=GB2312 <font face=3D"Default Sans Serif,Verdana,Arial,Helvetica,sans-serif" size= =3D"2">Hi=A3=BA<div> curr=5Fel=5Fsp0=5Firq/=5FAArch64=5FE= xception=5Finterrupt=5Fnest may use Incorrect sp. ARM-ARM descri= bed "on exception entry to Elx, SP=5FELx is automatically selected. so when= curr=5Fel=5Fsp0=5Firq/=5FAArch64=5FException=5Finterrupt=5Fnest will = use sp=5Fel1(this is task sp not interrupt sp) . Use gdb to verify cu= rr=5Fel=5Fsp0=5Firq/=5FAArch64=5FException=5Finterrupt=5Fnest really use In= correct sp.</div><div></div></font> --===============2981437180978567400== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ users mailing list [email protected] http://lists.rtems.org/mailman/listinfo/users --===============2981437180978567400==--