Re: [LIP] pci_alloc_consistent usage in x86-64 kernel
"Sathya Prakash V" <[email protected]>
| Newsgroups | gmane.user-groups.linux.india.programmers |
|---|---|
| Message-ID | <[email protected]> |
Hi Arun,
Thanks for your reply.
My device is 64-bit DMA capable and I am passing 64bit DMA as mask.
but as per the following code in pci-gart.c in arch/x86-64/kernel of 2.4.20
if (hwdev == NULL || hwdev->dma_mask < 0xffffffff || no_iommu)
gfp |= GFP_DMA;
If there is no_iommu then without considering the dma_mask the GFP_DMA is
set and the memory allocation is limited.
then as per the following code. for all the virtual memory allocated through
pci_alloc_consistent, If the address is beyond 4GB then the iommu is used
without considering the dma_mask.
{
int high = 0, mmu;
if (((unsigned long)virt_to_bus(memory) + size) > 0xffffffffUL)
high = 1;
mmu = high;
if (force_mmu && !(gfp & GFP_DMA))
mmu = 1;
if (no_iommu) {
if (high) goto error;
mmu = 0;
}
memset(memory, 0, size);
if (!mmu) {
*dma_handle = virt_to_bus(memory);
return memory;
}
But I have got another finding that with Few makes of motherboard with same
kernel I am able to allocate more than 4GB. I am confused about the
behaviour of the above code which I predicted earlier.
As I dont have hardware resources here I couldnt debug much.
If you can give me some pointers it will be of great help.
Thanks
Sathya
>From: Arun Sharma <[email protected]>
>Reply-To: linux-india-programmers-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org
>To: linux-india-programmers-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org
>Subject: Re: [LIP] pci_alloc_consistent usage in x86-64 kernel
>Date: Sun, 30 May 2004 10:24:30 -0700
>
>On Thu, May 27, 2004 at 08:09:14PM +0000, Sathya Prakash V wrote:
> >
> > By debugging I am able to identify the iommu_alloc function in
>pci_gart.c
> > is returning fail.
>
>iommu is needed only for those PCI devices which are not able to DMA
>beyond 32 bits i.e. 4GB. In those cases, some platforms implement a
>piece of hardware that sets up a 32 bit bus address for the PCI device
>to see, but which is mapped to a 64 bit physical address i.e. any place
>in physical memory. x86-64 hacks the AGP GART hardware to implement
>this functionality.
>
>Is your emulated device capable of 64 bit DMA ? If yes, why is it
>passing a dma_mask of less than 4GB ?
>
> -Arun
>
>
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