Re: [LIP] segment registers to handle stack over flow

On Thu, Jan 06, 2005 at 06:39:10PM +0530, Trideepraj Roychoudhury wrote:
> i think there is a basic mistake in understanding stack overflows with
> respect to intel x86 atleast (dont know about other systems). In newer
> 32-bit systems segmentation is just a myth since all modern OS's use
> Flat-Memory Model where every segment spans the complete 4GB address
> space.

Not entirely true. The NPTL implementation of POSIX threads uses 
%gs for thread local storage. This segment is not 0-4GB.

> 
> 
> To solve the buffer overflow, some modern architectures make the stack
> non-executable( i think amd64 does so). but for Intel x86 it is executable
> and hence the buffer overflow attacks.
> 
> i hope i am not wrong. if i am please correct me.

Intel x86 processors have it too.

http://www.intel.com/business/bss/infrastructure/security/xdbit.htm

You can use this feature in:

- 64 bit mode (IA32e)
- 32 bit mode if PAE is enabled

Itanium processors have had it for a few years now.

	-Arun

Disclosure: I work for Intel.


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