Re: [PATCH] Revert "x86/fpu: Refine and simplify the magic number check during signal return"

On Fri, May 1, 2026 at 2:04=E2=80=AFPM Chang S. Bae <[email protected]=
om> wrote:
>
> On 5/1/2026 1:50 PM, Andrei Vagin wrote:
> >
> > This is a different; here, we have two different CPU vendors where XSAV=
E
> > layouts differ. The XSAVE layout itself is not the only reason why migr=
ation
> > between Intel and AMD cannot work reliably.
> When saying CPU A and B, I didn't intend the same vendor but x86 in gener=
al.

My point is that the reverted change broke a significant, real-life use
case that the hardware was explicitly designed to support.

It is the responsibility of C/R tooling to ensure the migration target
is compatible with the source. Enforcing a magic check based on a fixed
offset does not provide additional security. The kernel must be prepared
to handle "trash" data in the userspace xsave area and manage any
exceptions triggered by the xrstor instruction.

Thanks,
Andrei