Re: [PATCH v7 2/7] arm64: dts: imx8mm: imx8mp: Add LVDS DTOs for Data Modul i.MX8M Mini and Plus eDM SBC

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] Incorrect backlight enable GPIO and pinctrl applied for the g215hvn011 panel on the native i.MX8MP LVDS interface.
- [Medium] The `assigned-clock-rates` property in `&media_blk_ctrl` lacks the required `assigned-clocks` property, causing the LVDS panel clock configuration to be silently ignored.
--

--- Patch [2]: [PATCH v7 2/7] arm64: dts: imx8mm: imx8mp: Add LVDS DTOs for Data Modul i.MX8M Mini and Plus eDM SBC ---
commit 57ce2b382e55c1c98951209e8e0a8f4ea3f2c65c
Author: Marek Vasut <[email protected]>

arm64: dts: imx8mm: imx8mp: Add LVDS DTOs for Data Modul i.MX8M Mini and Plus eDM SBC

This patch adds DT overlays for the DSI-to-LVDS adapter populated with a
Lontium LT9211 bridge on Data Modul i.MX8M Mini and Plus eDM SBCs. It
supports multiple panels for both the bridge and native i.MX8MP LVDS
interfaces.

> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g215hvn011.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g215hvn011.dtsi
> new file mode 100644
> index 0000000000000..3585170bd59dd
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g215hvn011.dtsi
> @@ -0,0 +1,30 @@
[ ... ]
> +&backlight {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_panel_backlight>;
> +	enable-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
> +	/* 6.5 POWER ON/OFF SEQUENCE, T6 >= 10 ms */

[ ... ]

> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g215hvn011.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g215hvn011.dtso
> new file mode 100644
> index 0000000000000..a6d13c3609796
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g215hvn011.dtso
> @@ -0,0 +1,36 @@
[ ... ]
> +&backlight {
> +	power-supply = <&reg_panel_bl_supply>;
> +};

[Severity: Medium]
Will this result in the wrong GPIO being toggled for the native i.MX8MP LVDS
interface?

The shared imx8mm-data-modul-edm-sbc-overlay-lvds-g215hvn011.dtsi file hardcodes
enable-gpios to &gpio3 0 and defines a pinctrl. However, the native i.MX8MP
LVDS interface uses the IO expander's &gpiowifi 0 (via reg_panel_bl in
edm-sbc-imx8mp-lvds.dtsi). 

Since this overlay only overrides power-supply and does not remove the
inapplicable pinctrl or override enable-gpios, won't the backlight driver
toggle the incorrect baseboard adapter GPIO pin instead of the intended one?

[ ... ]

> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g101ice-l01.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g101ice-l01.dtso
> new file mode 100644
> index 0000000000000..817d4ec62d0e8
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g101ice-l01.dtso
> @@ -0,0 +1,24 @@
[ ... ]
> +&media_blk_ctrl {
> +	/*
> +	 * The G101ICE-L01 panel requires 71.1 MHz LVDS clock.
> +	 * Set IMX8MP_VIDEO_PLL1 to 497.7 MHz , since 497.7 MHz / 7 = 71.1 MHz .
> +	 */
> +	assigned-clock-rates = <500000000>, <200000000>,
> +			       <0>, <0>, <500000000>, <497700000>;
> +};

[Severity: Medium]
Will this clock configuration be silently ignored by the clock framework?

This overlay (and several others for the native LVDS interface) defines
assigned-clock-rates without providing or inheriting an accompanying
assigned-clocks array.

The base board file imx8mp-data-modul-edm-sbc.dts does not include
imx8mp-nominal.dtsi, where the assigned-clocks array is typically defined. 

When assigned-clocks is missing, of_parse_phandle_with_args() returns -ENOENT,
and __set_clk_rates() silently skips setting the rates. Should assigned-clocks
be explicitly defined here so the panel clock frequency is correctly set?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=2