[RESEND PATCH v6 0/6] can: flexcan: Add NXP S32N79 SoC support
Ciprian Costea <[email protected]>
| Newsgroups | dev.linux.lists.imx,org.kernel.vger.linux-can,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
From: Ciprian Marian Costea <[email protected]> This patch series adds FlexCAN support for the NXP S32N79 SoC. The S32N79 is an automotive-grade processor from NXP with multiple FlexCAN instances. The FlexCAN IP integration on S32N79 differs from other SoCs in the interrupt routing - it uses two separate interrupt lines: - one interrupt for mailboxes 0-127 - one interrupt for bus error detection and device state changes The CAN controllers are connected through an irqsteer interrupt controller in the RCU (Resource Control Unit) domain. This series: 1. Splits flexcan_irq() into dedicated handlers for multi-IRQ platforms 2. Adds dt-bindings documentation for S32N79 FlexCAN 3. Introduces FLEXCAN_QUIRK_IRQ_BERR to handle the two-interrupt configuration 4. Adds S32N79 device data and compatible string to the driver 5. Adds FlexCAN device tree nodes for S32N79 SoC 6. Enables FlexCAN devices on the S32N79-RDB board Tested on S32N79-RDB board with CAN and CAN FD communication. v6 -> v5 - Addressed a couple of cosmetic issues on patches 3 and 5 . - Removed dts related changes as they should be sent on different review list v5 -> v4 - Simplified splitting rx/tx masks per mailbox IRQ line v4 -> v3 - flexcan_chip_interrupts_enable(): disable/enable all IRQ lines (not just dev->irq) during IMASK register writes - Split rx/tx masks per mailbox IRQ line (struct flexcan_mb_irq) so each handler on S32G2 only processes its own MB range - Added received Acked-by tag on DT bindings patch v3 -> v2 - Split flexcan_irq() into dedicated handlers (flexcan_irq_mb, flexcan_irq_boff, flexcan_irq_berr) to fix duplicate event processing when multiple IRQ lines run concurrently (new patch). - Added flexcan_irq_esr() handler composing state + berr for S32N79 - Ordered quirks used by s32n devtype data by value. v2 -> v1 - Renamed FLEXCAN_QUIRK_NR_IRQ_2 to FLEXCAN_QUIRK_IRQ_BERR to better describe the actual hardware feature - Appended new quirk at the end - Switched from platform_get_irq to platform_get_irq_byname usage - Updated interrupt description in dt-bindings Ciprian Marian Costea (6): can: flexcan: use dedicated IRQ handlers for multi-IRQ platforms can: flexcan: disable all IRQ lines in flexcan_chip_interrupts_enable() can: flexcan: split rx/tx masks per mailbox IRQ line dt-bindings: can: fsl,flexcan: add NXP S32N79 SoC support can: flexcan: add FLEXCAN_QUIRK_IRQ_BERR quirk can: flexcan: add NXP S32N79 SoC support .../bindings/net/can/fsl,flexcan.yaml | 30 ++- drivers/net/can/flexcan/flexcan-core.c | 226 +++++++++++++++--- drivers/net/can/flexcan/flexcan.h | 2 + 3 files changed, 229 insertions(+), 29 deletions(-) -- 2.43.0