Re: [PATCH net-next 2/2] net: fec: support receive flushing via fsl,rx-flush-queues

Hi all,

On Fri, 2026-08-14 at 11:09 +0200, A. Sverdlin wrote:
> From: Alexander Sverdlin <[email protected]>
> 
> The FEC/ENET controller can flush frames stuck at the head of the RX FIFO
> when their destination ring has no empty buffer descriptor, instead of
> letting them block the FIFO. This is controlled per RX queue through the
> RX_FLUSHn bits of the QOS Scheme register (FEC_QOS_SCHEME).
> 
> Parse the new fsl,rx-flush-queues property, build the RX flush mask and
> program it in fec_enet_enable_ring().
> 
> Erratum ERR050395 (e.g. i.MX8QXP) can cause an RX path lock-up when
> flushing is enabled on more than one queue at a time. Rather than encoding
> that limitation in the binding, enforce it in the driver: reject a
> configuration that enables flushing on multiple queues unless the
> controller advertises FEC_QUIRK_HAS_MULTI_RX_FLUSH, which future parts with
> the erratum fixed can set.
> 
> Signed-off-by: Alexander Sverdlin <[email protected]>
> ---
>  drivers/net/ethernet/freescale/fec.h      | 14 ++++++++++
>  drivers/net/ethernet/freescale/fec_main.c | 34 +++++++++++++++++++++++
>  2 files changed, 48 insertions(+)
> 
> diff --git a/drivers/net/ethernet/freescale/fec.h b/drivers/net/ethernet/freescale/fec.h
> index 7176803146f3d..4af3ae286895f 100644
> --- a/drivers/net/ethernet/freescale/fec.h
> +++ b/drivers/net/ethernet/freescale/fec.h
> @@ -499,6 +504,12 @@ struct bufdesc_ex {
>  /* Jumbo Frame support */
>  #define FEC_QUIRK_JUMBO_FRAME		BIT(25)
>  
> +/* Receive flushing (QOS Scheme register RX_FLUSHn) may be enabled on more than
> + * one RX queue at a time. Parts without this quirk are subject to erratum
> + * ERR050395 and must limit RX flushing to a single queue.
> + */
> +#define FEC_QUIRK_HAS_MULTI_RX_FLUSH	BIT(24)
                                            ^^
This of course should have been "26" (rebasing artifact :( )
Will fix it in v2

> +
>  struct bufdesc_prop {
>  	int qid;
>  	/* Address of Rx and Tx buffers */

-- 
Alexander Sverdlin
Siemens AG
www.siemens.com