Re: [PATCH v4 3/5] irqchip/imx-irqsteer: Dispose of parent IRQ mappings in remove()

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] Unbalanced PM runtime teardown leads to clock underflow on driver unbind.
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--- Patch [3]: [PATCH v4 3/5] irqchip/imx-irqsteer: Dispose of parent IRQ mappings in remove() ---
commit 58fbfcc1ec63bf5165fed17c40b2a3a04a6235ef
Author: Zhipeng Wang <[email protected]>

irqchip/imx-irqsteer: Dispose of parent IRQ mappings in remove()

This commit fixes a resource leak in the imx-irqsteer driver by properly
disposing of parent output interrupt mappings during the remove callback.
It ensures that the mappings created in probe are torn down when the
driver unbinds.

> diff --git a/drivers/irqchip/irq-imx-irqsteer.c b/drivers/irqchip/irq-imx-irqsteer.c
> --- a/drivers/irqchip/irq-imx-irqsteer.c
> +++ b/drivers/irqchip/irq-imx-irqsteer.c
> @@ -283,6 +283,7 @@ static void imx_irqsteer_remove(struct platform_device *pdev)
>  
>  		irq_set_chained_handler_and_data(irqsteer_data->irq[i],
>  						 NULL, NULL);
> +		irq_dispose_mapping(irqsteer_data->irq[i]);
>  	}
>  
>  	clk_disable_unprepare(irqsteer_data->ipg_clk);

[Severity: High]
This is a pre-existing issue, but does this clock disable cause an underflow
when unbinding the driver?

When the driver unbinds, the driver core calls pm_runtime_put_sync(), which
suspends the device and calls imx_irqsteer_suspend(). That suspend function
already calls clk_disable_unprepare(ipg_clk).

Immediately after, imx_irqsteer_remove() executes and unconditionally calls
clk_disable_unprepare() again on the already suspended device. Can this
double disable lead to a clock count underflow WARN and potentially disable
a shared clock?

Additionally, since imx_irqsteer_remove() lacks a pm_runtime_disable()
call, will leaving the PM runtime disable depth unbalanced cause an
unbalanced pm_runtime_enable warning if the driver is later rebound?

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Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=3