[PATCH 1/2] arm64: dts: imx8mp-evk: enable CBTU02043 for USB Type-C orientation switch

"Peng Fan (OSS)" <[email protected]>
Newsgroups dev.linux.lists.imx,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel
Message-ID <[email protected]>
From: Peng Fan <[email protected]>

The imx8mp-evk board has a NXP CBTU02043 crossbar switch between the
USB Type-C connector and the ptn5110 TCPC. The CBTU02043 SEL pin
(GPIO4_IO20) is used by the ptn5110 orientation-gpios to detect the
CC orientation, but the switch must first be enabled by driving its
XSD (shutdown) pin low.

Add a gpio-hog on GPIO2_IO20 (MX8MP_IOMUXC_SD2_WP__GPIO2_IO20) to
hold the XSD pin low, keeping the CBTU02043 always enabled. Per the
datasheet, XSD is active-low: LOW for normal operation, HIGH for
shutdown (high impedance). Without this, the orientation switch does
not function as all paths through the crossbar are in high-Z state.

Also add a separate pinctrl_cbtu02043_xsd group for the XSD pin.

Fixes: 6e62bc736674 ("arm64: dts: imx8mp-evk: add typec node")
Signed-off-by: Peng Fan <[email protected]>
---
 arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index 7bdd641292fb..dc3baeac5e3d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -935,6 +935,17 @@ usb3_data_hs: endpoint {
 	};
 };
 
+&gpio2 {
+	cbtu02043-xsd-hog {
+		gpio-hog;
+		gpios = <20 GPIO_ACTIVE_LOW>;
+		output-low;
+		line-name = "CBTU02043_XSD";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_cbtu02043_xsd>;
+	};
+};
+
 &usb3_phy1 {
 	fsl,phy-tx-preemp-amp-tune-microamp = <1800>;
 	fsl,phy-tx-vref-tune-percent = <116>;
@@ -1021,6 +1032,12 @@ MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29		0xd6
 		>;
 	};
 
+	pinctrl_cbtu02043_xsd: cbtu02043xsdgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD2_WP__GPIO2_IO20	0x16
+		>;
+	};
+
 	pinctrl_csi_mclk: csi_mclk_grp {
 		fsl,pins = <
 			MX8MP_IOMUXC_GPIO1_IO15__CCM_CLKO2	0x50

-- 
2.51.0
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