Re: [PATCH 1/2] arm64: dts: imx8qm-ss-conn: Add USB HSIC related nodes

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Invalid and spurious use of the `#stream-id-cells = <1>;` property on a USB controller node.
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--- Patch [1]: [PATCH 1/2] arm64: dts: imx8qm-ss-conn: Add USB HSIC related nodes ---
commit 3f8b073ab02e59ddadf748e8d5c304f634b67d3b
Author: Franz Schnyder <[email protected]>

arm64: dts: imx8qm-ss-conn: Add USB HSIC related nodes
    
This commit adds the required nodes to support the iMX8QM/QP USB HSIC host
controller.

[ ... ]
> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> index ccf9f510e0f88..168f89eebeedb 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> @@ -4,6 +4,32 @@
>   *	Dong Aisheng <[email protected]>
>   */
>  
> +&conn_subsys {
> +	usbh1: usb@5b0e0000 {
> +		compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb", "fsl,imx27-usb";
> +		reg = <0x5b0e0000 0x200>;
> +		interrupt-parent = <&gic>;
> +		interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> +		phy_type = "hsic";
> +		dr_mode = "host";
> +		fsl,usbphy = <&usbphynop2>;
> +		fsl,usbmisc = <&usbmisc2 0>;
> +		clocks = <&usb2_lpcg IMX_LPCG_CLK_6>;
> +		ahb-burst-config = <0x0>;
> +		tx-burst-size-dword = <0x10>;
> +		rx-burst-size-dword = <0x10>;
> +		#stream-id-cells = <1>;

[Severity: Low]
Does this code introduce a dt-bindings validation failure? 

The usbh1 node defines #stream-id-cells = <1>;, which is a legacy ARM SMMU
property meant for master buses. The chipidea,usb2 dt-bindings specify
unevaluatedProperties: false and do not include #stream-id-cells, resulting
in a dtbs_check validation failure.

> +		power-domains = <&pd IMX_SC_R_USB_1>;
> +		status = "disabled";
> +	};

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1