Re: [PATCH v5 0/6] iommufd: Iterate the cache invalidation array in the core
Will Deacon <[email protected]> Sun, 2 Aug 2026 13:12:27 +0100
| Newsgroups | dev.linux.lists.iommu,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
On Tue, 28 Jul 2026 10:33:32 -0700, Nicolin Chen wrote:
> The vIOMMU cache_invalidate() and the nested-HWPT cache_invalidate_user()
> ops are each handed the full user invalidation array and must report, via
> array->entry_num, how many of its entries they handled. That makes every
> driver open-code the same array walk, with real downsides:
>
> - each driver carries its own loop and sub-array bookkeeping;
> - the ARM SMMUv3 driver allocates a buffer sized to the whole array just
> to iterate over it;
> - hand-rolling the loop left the ARM SMMUv3 driver with two long-standing
> bugs:
> 1) on a conversion failure it counts commands that it converted but
> never issued, so user space skips invalidations that never reached
> the cmdq;
> 2) it rejects a zero-length array, which the uAPI documents as a valid
> request that only probes the data type.
>
> [...]
Applied first patch to iommu (arm/smmu/updates), thanks!
[1/6] iommu/arm-smmu-v3: Support IDR5.DS and widen the TLBI SCALE field
https://git.kernel.org/iommu/c/773f2b9e3670
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev