Re: RISC-V

Hi Alexandre,

---- On Tue, 01 Oct 2024 12:21:49 -0300 Alexandre Ghiti  wrote ---

 > Hi everyone, 
 >  
 > We (the RISC-V community) are looking for improving our CIs that are 
 > currently spread over all the RISC-V companies, mostly private and very 
 > incomplete. 

That is great to hear!  We have other hardware vendors coming to KernelCI with the same wishes of improving CI overall.

 >  
 > I only found one RISC-V build in kernelci, can I do something to help 
 > adding a better RISC-V support?

YES!

First of all, we can enable more kernel trees and kernel configs in the maestro system.
That would give you wider build coverage. If you have a list of configs we can work on adding these.
- https://docs.kernelci.org/kernel-community/

Then, we have to look at running these kernel on actual RISC-V devices. We can get RISC-V devices in KernelCI through a maestro lab, either through some of the existing labs or setting up a dedicated lab. Cc'ing Rafael from RISC-V as we discussed that already.
- https://docs.kernelci.org/labs/

Another way, that could be relatively easy if you have a CI setup already, is to get the results of the current CIs in the RISC-V ecosystem into KCIDB (as long as you area running fully Open Source software in those tests).
- https://docs.kernelci.org/kcidb/

Let us know how does that sound to you. We would happy to learn more about the ways we can make this work and chat more with you.

Best,

- Gus