Re: [PATCH 3/4] iio: pressure: mpl3115: generalize interrupt pin routing

Hi Andy,

On Sat, May 30, 2026 at 9:40 PM Andy Shevchenko
<[email protected]> wrote:
> > No functional change intended.
>
> All the same issues in the commit message as with the previous
> change.

Right. I'll address it the same way in v2: drop the "no functional
change" line, split the unrelated changes, and rework the commit
message accordingly.

Thanks.

On Sat, May 30, 2026 at 9:40 PM Andy Shevchenko
<[email protected]> wrote:
>
> On Sat, May 30, 2026 at 1:40 PM SeungJu Cheon <[email protected]> wrote:
> >
> > Write CTRL_REG5 explicitly for both INT1 and INT2 rather than
> > relying on power-on defaults when INT2 is selected.
> >
> > This avoids incorrect interrupt routing after a suspend/resume
> > cycle where the register may not return to its default state.
> >
> > Route both DRDY and FIFO interrupts to the selected pin. The
> > FIFO routing is not yet used but is required by the hardware
> > FIFO support added in the following patch.
> >
> > Consolidate polarity configuration into a single code path
> > that handles both interrupt pins uniformly.
>
> > No functional change intended.
>
> All the same issues in the commit message as with the previous change.
>
> --
> With Best Regards,
> Andy Shevchenko