Re: [External] [PATCH v5 4/8] riscv_cbqri: Add capacity controller probe and allocation device ops

Drew Fustini <[email protected]>
Newsgroups dev.linux.lists.linux-rt-devel,org.infradead.lists.linux-riscv,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-doc,org.kernel.vger.linux-kernel
Message-ID <al5XD5UbluV_NyE3@thelio>
On Mon, Jul 20, 2026 at 08:12:28PM +0800, yunhui cui wrote:
> Hi Drew,
> 
> On Wed, Jul 15, 2026 at 8:24 AM Drew Fustini <[email protected]> wrote:
> >
> > Add support for the RISC-V CBQRI capacity controller. A platform driver
> > passes a cbqri_controller_info descriptor together with the cache level
> > to riscv_cbqri_register_cc_dt(), which probes the controller and adds it
> > to the controller list.
> >
> > Assisted-by: Claude:claude-opus-4-8
> > Co-developed-by: Adrien Ricciardi <[email protected]>
> > Signed-off-by: Adrien Ricciardi <[email protected]>
> > Signed-off-by: Drew Fustini <[email protected]>
> > ---
> >  MAINTAINERS                      |   3 +
> >  drivers/resctrl/Kconfig          |  13 +
> >  drivers/resctrl/Makefile         |   3 +
> >  drivers/resctrl/cbqri_devices.c  | 563 +++++++++++++++++++++++++++++++++++++++
> >  drivers/resctrl/cbqri_internal.h | 122 +++++++++
> >  include/linux/riscv_cbqri.h      |  45 ++++
> >  6 files changed, 749 insertions(+)
[..]
> > +static int cbqri_probe_cc(struct cbqri_controller *ctrl)
> > +{
> > +       int err, status;
> > +       int ver_major, ver_minor;
> > +       u64 reg;
> > +
> > +       reg = cbqri_readq(ctrl->base + CBQRI_CC_CAPABILITIES_OFF);
> > +       if (reg == 0)
> > +               return -ENODEV;
> > +
> > +       ver_minor = FIELD_GET(CBQRI_CC_CAPABILITIES_VER_MINOR_MASK, reg);
> > +       ver_major = FIELD_GET(CBQRI_CC_CAPABILITIES_VER_MAJOR_MASK, reg);
> > +       ctrl->cc.ncblks = FIELD_GET(CBQRI_CC_CAPABILITIES_NCBLKS_MASK, reg);
> > +
> > +       pr_debug("version=%d.%d ncblks=%d cache_level=%d\n",
> > +                ver_major, ver_minor,
> > +                ctrl->cc.ncblks, ctrl->cache.cache_level);
> > +
> > +       /*
> > +        * NCBLKS == 0 would divide-by-zero in the schemata math while
> > +        * ctrl->lock is held.
> > +        */
> > +       if (!ctrl->cc.ncblks) {
> > +               pr_warn("CC at %pa has 0 capacity blocks, skipping\n",
> > +                       &ctrl->addr);
> > +               return -ENODEV;
> > +       }
> > +
> > +       if (ctrl->cc.ncblks > 32) {
> > +               pr_warn("CC at %pa has ncblks=%u > 32 (resctrl CBM is u32), skipping\n",
> > +                       &ctrl->addr, ctrl->cc.ncblks);
> > +               return -ENODEV;
> > +       }
> 
> Could you add a short comment here, like MPAM does, to note that the
> NCBLKS <= 32 limit comes from resctrl using u32 bitmap configs?

Sure, I will add a comment that the limit comes from resctrl
representing the CBM as a u32.

Thanks,
Drew
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