Re: [PATCH v2 3/8] clk: sunxi-ng: a733: Add PRCM CCU
Enzo Adriano <[email protected]>
| Newsgroups | dev.linux.lists.linux-sunxi,org.infradead.lists.linux-arm-kernel,org.infradead.lists.linux-riscv,org.kernel.vger.linux-clk,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel,org.kernel.vger.netdev |
|---|---|
| Message-ID | <[email protected]> |
Hi Junhui, I re-reviewed patch 3 in v2 after Andre pointed out that my RFC reply lacked a formal tag. I compared the RFC and v2 PRCM drivers and rechecked v2 against the Allwinner A733 User Manual V0.92, chapter 4.2.5. I checked all 11 programmable clock definitions (register offsets and divider/mux/gate fields), all 18 bus-gate definitions, and all 13 reset-map entries. They match the manual. The RFC-to-v2 changes do not invalidate that check: the four R timer clocks move from the MP helper with no M field to the P-only helper while keeping their offsets and P/mux/gate fields unchanged, and the R PWM identifiers are renamed while keeping their offset/mux/gate fields unchanged. I also checked the gate-only BGRs for R-TWD, R-PPU, R-TZMA, and R-CPU-BIST; the manual defines gate bit 0 but no reset bit for those registers, matching v2. Reviewed-by: Enzo Adriano <[email protected]> This analysis was done with AI assistance and each finding was checked against the cited sources. Thanks, Enzo