Re: [PATCH] ARM: dts: allwinner: a10: Fix PMU interrupt
Chen-Yu Tsai <[email protected]>
| Newsgroups | dev.linux.lists.linux-sunxi,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
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| Message-ID | <[email protected]> |
On Mon, 20 Jul 2026 23:51:28 +0200, Andre Przywara wrote:
> The Performance Monitoring Unit of the Cortex-A8 cores in the Allwinner
> A10 SoC is connected to interrupt line 66, not 3. This is shown in the
> manual (where interrupt 3 is assigned to UART2, also in our .dtsi), but
> has also been confirmed by triggering an PMU overflow interrupt and
> inspecting the IRQ controller status registers (from U-Boot).
> Please note that "perf stat" does not use interrupts, this might explain
> why this evaded the initial testing.
>
> [...]
Applied to sunxi/dt-for-7.3 in sunxi, thanks!
[1/1] ARM: dts: allwinner: a10: Fix PMU interrupt
https://git.kernel.org/sunxi/linux/c/eb7051f75646
Best regards,
--
Chen-Yu Tsai <[email protected]>