Re: [PATCH 2/6] net: phy: maxio: parse and enable PHY clock from generic DT binding
Andrew Lunn <[email protected]> Tue, 4 Aug 2026 04:43:50 +0200
| Newsgroups | dev.linux.lists.linux-sunxi,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-devicetree,org.kernel.vger.netdev |
|---|---|
| Message-ID | <[email protected]> |
On Mon, Aug 03, 2026 at 12:14:48PM +0200, Andre Przywara wrote: > The generic PHY DT binding features a clocks property, which describes > the clock input to the PHY. Typically this is a crystal oscillator, so > it works without software interaction. But some boards want to save some > pennies on that part, and let a clock fanout pin from the SoC provide this > clock signal. In this case the PHY probe routine needs to enable this > clock explicitly. > > Look for a "clocks" property inside the PHY node and enable that clock, > if one is provided. > > This allows boards with a SoC-driven PHY clock to use the PHY. Please > note that without the clock enabled, the PHY will not be detected on the > MDIO bus, so the PHY-ID needs to be explicitly named in the PHY > compatible string: > compatible = "ethernet-phy-id7b74.4411"; > > Signed-off-by: Andre Przywara <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Andrew