Re: [PATCH 6/6] LoongArch: KVM: Enable separate vmid feature
Huacai Chen <[email protected]> Sun, 2 Aug 2026 22:14:43 +0800
| Newsgroups | dev.linux.lists.loongarch,org.kernel.vger.kvm,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <CAAhV-H46JoQpPx4Eg1eGT010Gq_4OnLNExhVrgjkdXkeoHESCA@mail.gmail.com> |
Hi, Bibo, On Mon, Jul 27, 2026 at 3:31=E2=80=AFPM Bibo Mao <[email protected]> wrot= e: > > With CSR GTLBC shortname for Guest TLB Control Register, separate vmid > feature will be enabled if bit 14 CSR_GTLBC_USEVMID is set. Enable > this feature if cpu_has_guestid is true when LVZ is enabled and the LVZ > version is 2. > > Signed-off-by: Bibo Mao <[email protected]> > --- > arch/loongarch/include/asm/loongarch.h | 2 ++ > arch/loongarch/kernel/cpu-probe.c | 7 ++++++- > arch/loongarch/kvm/main.c | 4 +++- > 3 files changed, 11 insertions(+), 2 deletions(-) > > diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/incl= ude/asm/loongarch.h > index 2a6bc99177d8..4c4249446a61 100644 > --- a/arch/loongarch/include/asm/loongarch.h > +++ b/arch/loongarch/include/asm/loongarch.h > @@ -350,6 +350,8 @@ > #define CSR_GTLBC_TGID_WIDTH 8 > #define CSR_GTLBC_TGID_SHIFT_END (CSR_GTLBC_TGID_SHIFT + CSR_GTLBC= _TGID_WIDTH - 1) > #define CSR_GTLBC_TGID (_ULCAST_(0xff) << CSR_GT= LBC_TGID_SHIFT) > +#define CSR_GTLBC_USEVMID_SHIFT 14 > +#define CSR_GTLBC_USEVMID (_ULCAST_(0x1) << CSR_GTLBC_USEVM= ID_SHIFT) > #define CSR_GTLBC_TOTI_SHIFT 13 > #define CSR_GTLBC_TOTI (_ULCAST_(0x1) << CSR_GTL= BC_TOTI_SHIFT) > #define CSR_GTLBC_USETGID_SHIFT 12 > diff --git a/arch/loongarch/kernel/cpu-probe.c b/arch/loongarch/kernel/cp= u-probe.c > index 74d31f260dfd..cbf1dafac0a0 100644 > --- a/arch/loongarch/kernel/cpu-probe.c > +++ b/arch/loongarch/kernel/cpu-probe.c > @@ -135,7 +135,7 @@ static void set_isa(struct cpuinfo_loongarch *c, unsi= gned int isa) > > static void cpu_probe_common(struct cpuinfo_loongarch *c) > { > - unsigned int config; > + unsigned int config, version; > unsigned long asid_mask; > > c->options =3D LOONGARCH_CPU_CPUCFG | LOONGARCH_CPU_CSR | LOONGAR= CH_CPU_VINT; > @@ -221,6 +221,11 @@ static void cpu_probe_common(struct cpuinfo_loongarc= h *c) > if (config & CPUCFG2_LVZP) { > c->options |=3D LOONGARCH_CPU_LVZ; > elf_hwcap |=3D HWCAP_LOONGARCH_LVZ; > + > + /* Separate VMID and VPID with LVZ version =3D=3D 2 */ > + version =3D (config & CPUCFG2_LVZVER) >> 11; > + if (version =3D=3D 2) I think ">1" judgement is better than "=3D=3D2". Huacai > + c->options |=3D LOONGARCH_CPU_GUESTID; > } > #ifdef CONFIG_CPU_HAS_LBT > if (config & CPUCFG2_X86BT) { > diff --git a/arch/loongarch/kvm/main.c b/arch/loongarch/kvm/main.c > index 86b1af823e2b..43f5b40786f2 100644 > --- a/arch/loongarch/kvm/main.c > +++ b/arch/loongarch/kvm/main.c > @@ -365,7 +365,7 @@ int kvm_arch_enable_virtualization_cpu(void) > write_csr_gcfg(0); > write_csr_gstat(0); > write_csr_gintc(0); > - clear_csr_gtlbc(CSR_GTLBC_USETGID | CSR_GTLBC_TOTI); > + clear_csr_gtlbc(CSR_GTLBC_USETGID | CSR_GTLBC_TOTI | CSR_GTLBC_US= EVMID); > > /* > * Enable virtualization features granting guest direct control o= f > @@ -388,6 +388,8 @@ int kvm_arch_enable_virtualization_cpu(void) > > /* Enable using TGID */ > set_csr_gtlbc(CSR_GTLBC_USETGID); > + if (cpu_has_guestid) > + set_csr_gtlbc(CSR_GTLBC_USEVMID); > kvm_debug("GCFG:%lx GSTAT:%lx GINTC:%lx GTLBC:%lx", > read_csr_gcfg(), read_csr_gstat(), read_csr_gintc(), re= ad_csr_gtlbc()); > > -- > 2.39.3 > >