Re: [PATCH 1/1] bus: mhi: pci_generic: add Rolling Wireless RW135R-GL and RW151 support

On 2026-06-03 14:06, [email protected] wrote:
> From: Wanquan Zhong <[email protected]>
> 
> bus: mhi: pci_generic: add Rolling Wireless RW135R-GL and RW151 support
> 
> Add MHI PCIe device configuration for Rolling Wireless modules:
> 
> - RW135R-GL (Qualcomm sdx35): MBIM, DIAG, DUN, NMEA, FIREHOSE, ADB, IP_HW0
> - RW151 (Qualcomm sdx75): same channel layout with adjusted ring sizes
> 
> Register PCI_DEVICE_SUB entries for vendor 0x2099, device 0x1300/1301 on
> QCOM 0x011a (sdx35) and 0x0309 (sdx75) respectively.
> 
> Enable the ADB MHI channel in mhi_wwan_ctrl so userspace can access the
> WWAN_PORT_ADB port via the wwan subsystem.
> 
> Tested-on: Rolling RW135R-GL / RW151 hardware (MHI probe, MBIM, DIAG, ADB)
> 
> Signed-off-by: Wanquan Zhong <[email protected]>
> ---
>   drivers/bus/mhi/host/pci_generic.c | 100 +++++++++++++++++++++++++++++
>   drivers/net/wwan/mhi_wwan_ctrl.c   |   1 +
>   2 files changed, 101 insertions(+)
> 
> diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
> index 0884a384b77f..ad166de2d0f3 100644
> --- a/drivers/bus/mhi/host/pci_generic.c
> +++ b/drivers/bus/mhi/host/pci_generic.c
> @@ -902,6 +902,94 @@ static const struct mhi_pci_dev_info mhi_netprisma_fcun69_info = {
>   	.sideband_wake = true,
>   };
>   
> +static const struct mhi_channel_config mhi_rolling_rw135r_channels[] = {
> +	MHI_CHANNEL_CONFIG_UL(4, "DIAG", 64, 1),
> +	MHI_CHANNEL_CONFIG_DL(5, "DIAG", 64, 1),
> +	MHI_CHANNEL_CONFIG_UL(12, "MBIM", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL(13, "MBIM", 32, 0),
> +	MHI_CHANNEL_CONFIG_UL(14, "NMEA", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL(15, "NMEA", 32, 0),
> +	MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0),
> +	MHI_CHANNEL_CONFIG_UL_FP(34, "FIREHOSE", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL_FP(35, "FIREHOSE", 32, 0),
> +	MHI_CHANNEL_CONFIG_UL(36, "ADB", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL(37, "ADB", 32, 0),
> +	MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 128, 2),
> +	MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 128, 3),
> +};
> +
> +static struct mhi_event_config mhi_rolling_rw135r_events[] = {
> +	MHI_EVENT_CONFIG_CTRL(0, 128),
> +	MHI_EVENT_CONFIG_DATA(1, 128),
> +	MHI_EVENT_CONFIG_HW_DATA(2, 1024, 100),
> +	MHI_EVENT_CONFIG_HW_DATA(3, 2048, 101),
> +};
> +
> +static const struct mhi_controller_config modem_rolling_rw135r_config = {
> +	.max_channels = 128,
> +	.timeout_ms = 8000,
> +	.num_channels = ARRAY_SIZE(mhi_rolling_rw135r_channels),
> +	.ch_cfg = mhi_rolling_rw135r_channels,
> +	.num_events = ARRAY_SIZE(mhi_rolling_rw135r_events),
> +	.event_cfg = mhi_rolling_rw135r_events,
> +};
> +
> +static const struct mhi_pci_dev_info mhi_rolling_rw135r_info = {
> +	.edl = "qcom/sdx35m/prog_firehose_ddr.elf",
> +	.name = "rolling-rw135r",
> +	.config = &modem_rolling_rw135r_config,
> +	.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
> +	.dma_data_width = 32,
> +	.sideband_wake = false,
> +	.mru_default = 32768,
> +	.edl_trigger = true,
> +};
> +
> +static const struct mhi_channel_config mhi_rolling_rw151_channels[] = {
> +	MHI_CHANNEL_CONFIG_UL(4, "DIAG", 16, 1),
> +	MHI_CHANNEL_CONFIG_DL(5, "DIAG", 16, 1),
> +	MHI_CHANNEL_CONFIG_UL(12, "MBIM", 4, 0),
> +	MHI_CHANNEL_CONFIG_DL(13, "MBIM", 4, 0),
> +	MHI_CHANNEL_CONFIG_UL(14, "NMEA", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL(15, "NMEA", 32, 0),
> +	MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0),
> +	MHI_CHANNEL_CONFIG_UL_FP(34, "FIREHOSE", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL_FP(35, "FIREHOSE", 32, 0),
> +	MHI_CHANNEL_CONFIG_UL(36, "ADB", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL(37, "ADB", 32, 0),
> +	MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 128, 2),
> +	MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 128, 3),
> +};
> +
> +static struct mhi_event_config mhi_rolling_rw151_events[] = {
> +	MHI_EVENT_CONFIG_CTRL(0, 128),
> +	MHI_EVENT_CONFIG_DATA(1, 128),
> +	MHI_EVENT_CONFIG_HW_DATA(2, 1024, 100),
> +	MHI_EVENT_CONFIG_HW_DATA(3, 2048, 101),
> +};
> +
> +static const struct mhi_controller_config modem_rolling_rw151_config = {
> +	.max_channels = 128,
> +	.timeout_ms = 50000,
> +	.num_channels = ARRAY_SIZE(mhi_rolling_rw151_channels),
> +	.ch_cfg = mhi_rolling_rw151_channels,
> +	.num_events = ARRAY_SIZE(mhi_rolling_rw151_events),
> +	.event_cfg = mhi_rolling_rw151_events,
> +};
> +
> +static const struct mhi_pci_dev_info mhi_rolling_rw151_info = {
> +	.edl = "qcom/sdx75m/prog_firehose_lite.elf",
> +	.name = "rolling-rw151",
> +	.config = &modem_rolling_rw151_config,
> +	.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
> +	.dma_data_width = 32,
> +	.sideband_wake = false,
> +	.mru_default = 32768,
> +	.edl_trigger = true,
> +};
> +
>   /* Keep the list sorted based on the PID. New VID should be added as the last entry */
>   static const struct pci_device_id mhi_pci_id_table[] = {
>   	{PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0116),
> @@ -909,6 +997,12 @@ static const struct pci_device_id mhi_pci_id_table[] = {
>   	/* Telit FN920C04 (sdx35) */
>   	{PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x011a, 0x1c5d, 0x2020),
>   		.driver_data = (kernel_ulong_t) &mhi_telit_fn920c04_info },
> +	/* Rolling RW135R-GL (sdx35) */
> +	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x011a, 0x2099, 0x1300),
> +		.driver_data = (kernel_ulong_t) &mhi_rolling_rw135r_info },
> +	/* Rolling RW135R-GL (sdx35) */
> +	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x011a, 0x2099, 0x1301),
> +		.driver_data = (kernel_ulong_t) &mhi_rolling_rw135r_info },
>   	{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0304),
>   		.driver_data = (kernel_ulong_t) &mhi_qcom_sdx24_info },
>   	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0306, PCI_VENDOR_ID_QCOM, 0x010c),
> @@ -941,6 +1035,12 @@ static const struct pci_device_id mhi_pci_id_table[] = {
>   	/* Telit FE990B40 (sdx72) */
>   	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0309, 0x1c5d, 0x2025),
>   		.driver_data = (kernel_ulong_t) &mhi_telit_fe990b40_info },
> +	/* Rolling RW151 (sdx75) */
> +	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0309, 0x2099, 0x1300),
> +		.driver_data = (kernel_ulong_t) &mhi_rolling_rw151_info },
> +	/* Rolling RW151 (sdx75) */
> +	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0309, 0x2099, 0x1301),
> +		.driver_data = (kernel_ulong_t) &mhi_rolling_rw151_info },
>   	{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0309),
>   		.driver_data = (kernel_ulong_t) &mhi_qcom_sdx75_info },
>   	/* QDU100, x100-DU */
> diff --git a/drivers/net/wwan/mhi_wwan_ctrl.c b/drivers/net/wwan/mhi_wwan_ctrl.c
> index fa73861db6ad..c0bba94d5c3f 100644
> --- a/drivers/net/wwan/mhi_wwan_ctrl.c
> +++ b/drivers/net/wwan/mhi_wwan_ctrl.c
> @@ -264,6 +264,7 @@ static const struct mhi_device_id mhi_wwan_ctrl_match_table[] = {
>   	{ .chan = "DIAG", .driver_data = WWAN_PORT_QCDM },
>   	{ .chan = "FIREHOSE", .driver_data = WWAN_PORT_FIREHOSE },
>   	{ .chan = "NMEA", .driver_data = WWAN_PORT_NMEA },
> +	{ .chan = "ADB", .driver_data = WWAN_PORT_ADB },
>   	{},
>   };
>   MODULE_DEVICE_TABLE(mhi, mhi_wwan_ctrl_match_table);
> 
> --
> 2.43.0
> 
> 
Hi,
does both the sdx35 and the sdx75 device really have the same Rolling 
PCI Vid:Pid (2099:1300 and 2099:1301)?

thanks
Lars