Re: [PATCH v3 1/1] bus: mhi: pci_generic: fix Rolling Wireless RW135R-GL and RW151 support

On Wed, Jul 1, 2026 at 11:54=E2=80=AFAM <[email protected]> wrote:
>
> From: Wanquan Zhong <[email protected]>
>
> bus: mhi: pci_generic: fix Rolling Wireless RW135R-GL and RW151 support
>
> - Increase RW151 MBIM channel ring size from 4 to 32

Why? What is the problem today? If they don=E2=80=99t address the same issu=
e,
they should be split into two separate patches.

>
> On HP and Lenovo laptop platforms the device probes successfully and
> WWAN ports are created, but pci_generic enables runtime autosuspend
> (PCI D3hot/M3) after a short idle period. Resume from runtime PM leaves
> the modem in MHI SYS ERROR; driver recovery (reset) fails and the device
> becomes inaccessible (PCIe config space reads as 0x7f). The failure is no=
t
> self-recoverable while runtime PM remains enabled; keeping power/control=
=3Don
> avoids the issue.
>
> Set no_m3 on RW135R-GL and RW151 so probe does not enable runtime M3
> autosuspend for these modules.
>
> Power management testing (separate from runtime PM above):
> - Suspend-to-RAM (S3/mem): tested on RW135R-GL and RW151; MHI/MBIM/wwan
>   function after wake.
> - Suspend-to-disk (hibernate): not available on the test platforms
>   (/sys/power/state lacks "disk", ENODEV).
>
> Signed-off-by: Wanquan Zhong <[email protected]>
>
> ---
> v2 -> v3: RW151 MBIM ring size 32; disable runtime M3 (no_m3)
>  drivers/bus/mhi/host/pci_generic.c | 4 +++-
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pc=
i_generic.c
> index d598bb3b3981..d0fee7e3ba3a 100644
> --- a/drivers/bus/mhi/host/pci_generic.c
> +++ b/drivers/bus/mhi/host/pci_generic.c
> @@ -942,6 +942,7 @@ static const struct mhi_pci_dev_info mhi_rolling_rw13=
5r_info =3D {
>         .bar_num =3D MHI_PCI_DEFAULT_BAR_NUM,
>         .dma_data_width =3D 32,
>         .sideband_wake =3D false,
> +       .no_m3 =3D true,
>         .mru_default =3D 32768,
>         .edl_trigger =3D true,
>  };
> @@ -949,8 +950,8 @@ static const struct mhi_pci_dev_info mhi_rolling_rw13=
5r_info =3D {
>  static const struct mhi_channel_config mhi_rolling_rw151_channels[] =3D =
{
>         MHI_CHANNEL_CONFIG_UL(4, "DIAG", 16, 1),
>         MHI_CHANNEL_CONFIG_DL(5, "DIAG", 16, 1),
> -       MHI_CHANNEL_CONFIG_UL(12, "MBIM", 4, 0),
> -       MHI_CHANNEL_CONFIG_DL(13, "MBIM", 4, 0),
> +       MHI_CHANNEL_CONFIG_UL(12, "MBIM", 32, 0),
> +       MHI_CHANNEL_CONFIG_DL(13, "MBIM", 32, 0),
>         MHI_CHANNEL_CONFIG_UL(14, "NMEA", 32, 0),
>         MHI_CHANNEL_CONFIG_DL(15, "NMEA", 32, 0),
>         MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0),
> @@ -986,6 +987,7 @@ static const struct mhi_pci_dev_info mhi_rolling_rw15=
1_info =3D {
>         .bar_num =3D MHI_PCI_DEFAULT_BAR_NUM,
>         .dma_data_width =3D 32,
>         .sideband_wake =3D false,
> +       .no_m3 =3D true,
>         .mru_default =3D 32768,
>         .edl_trigger =3D true,
>  };
>
> --
> 2.50.0
>