Re: [PATCH v3 3/7] drm: nova: Add chipid enum to nova-drm UAPI
Alistair Popple <[email protected]> Tue, 28 Jul 2026 18:00:59 +1000
| Newsgroups | dev.linux.lists.nova-gpu,org.freedesktop.lists.dri-devel,org.kernel.vger.linux-kernel,org.kernel.vger.rust-for-linux |
|---|---|
| Message-ID | <[email protected]> |
On 2026-07-26 at 01:23 +1000, Danilo Krummrich <[email protected]> wrote... > On Thu Jul 23, 2026 at 8:30 AM CEST, Alistair Popple wrote: > > diff --git a/include/uapi/drm/nova_drm.h b/include/uapi/drm/nova_drm.h > > index 3ca90ed9d2bb..cb13fba6b952 100644 > > --- a/include/uapi/drm/nova_drm.h > > +++ b/include/uapi/drm/nova_drm.h > > @@ -25,6 +25,39 @@ extern "C" { > > */ > > #define NOVA_GETPARAM_VRAM_BAR_SIZE 0x1 > > > > +enum drm_nova_chipid { > > It seems trivial, but let's add at least some documentation. No, good idea. > For instance, what's valid for userspace to extract from this? Given chipid is a > composed value, is userspace e.g. allowed to make assumptions on extracting the > architecture? Or is this something we want to expose separately and tell > userspace that the chipid is an opaque value identifying a specific chip only? I _think_ it makes sense for this to just be an opaque value, but it's a good question that I should probably try and get some internal feedback on as well. Reading the arch would then be a separate parameter. > > + /* Turing */ > > + NOVA_DRM_CHIPID_TU102 = 0x162, > > + NOVA_DRM_CHIPID_TU104 = 0x164, > > + NOVA_DRM_CHIPID_TU106 = 0x166, > > + NOVA_DRM_CHIPID_TU117 = 0x167, > > + NOVA_DRM_CHIPID_TU116 = 0x168, > > + /* Ampere */ > > + NOVA_DRM_CHIPID_GA100 = 0x170, > > + NOVA_DRM_CHIPID_GA102 = 0x172, > > + NOVA_DRM_CHIPID_GA103 = 0x173, > > + NOVA_DRM_CHIPID_GA104 = 0x174, > > + NOVA_DRM_CHIPID_GA106 = 0x176, > > + NOVA_DRM_CHIPID_GA107 = 0x177, > > + /* Hopper */ > > + NOVA_DRM_CHIPID_GH100 = 0x180, > > + /* Ada */ > > + NOVA_DRM_CHIPID_AD102 = 0x192, > > + NOVA_DRM_CHIPID_AD103 = 0x193, > > + NOVA_DRM_CHIPID_AD104 = 0x194, > > + NOVA_DRM_CHIPID_AD106 = 0x196, > > + NOVA_DRM_CHIPID_AD107 = 0x197, > > + /* Blackwell GB10x */ > > + NOVA_DRM_CHIPID_GB100 = 0x1a0, > > + NOVA_DRM_CHIPID_GB102 = 0x1a2, > > + /* Blackwell GB20x */ > > + NOVA_DRM_CHIPID_GB202 = 0x1b2, > > + NOVA_DRM_CHIPID_GB203 = 0x1b3, > > + NOVA_DRM_CHIPID_GB205 = 0x1b5, > > + NOVA_DRM_CHIPID_GB206 = 0x1b6, > > + NOVA_DRM_CHIPID_GB207 = 0x1b7, > > +};