Re: [PATCH v10 7/7] PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback

On Wed, Mar 25, 2026 at 08:06:24AM +0100, Niklas Cassel wrote:
> On Tue, Mar 24, 2026 at 10:40:24AM +0900, Koichiro Den wrote:
> > On Mon, Mar 23, 2026 at 02:48:10PM -0400, Frank Li wrote:
> > > On Mon, Mar 02, 2026 at 04:14:27PM +0900, Koichiro Den wrote:
> > > > Some endpoint platforms cannot use platform MSI / GIC ITS to implement
> > > > EP-side doorbells. In those cases, EPF drivers cannot provide an
> > > > interrupt-driven doorbell and often fall back to polling.
> > > >
> > > > Add an "embedded" doorbell backend that uses a controller-integrated
> > > > doorbell target (e.g. DesignWare integrated eDMA interrupt-emulation
> > > > doorbell).
> > > >
> > > > The backend locates the doorbell register and a corresponding Linux IRQ
> > > > via the EPC aux-resource API. If the doorbell register is already
> > > > exposed via a fixed BAR mapping, provide BAR+offset. Otherwise provide
> > > > the DMA address returned by dma_map_resource() (which may be an IOVA
> > > > when an IOMMU is enabled) so EPF drivers can map it into BAR space.
> > > >
> > > > When MSI doorbell allocation fails with -ENODEV,
> > > > pci_epf_alloc_doorbell() falls back to this embedded backend.
> > > >
> > > > Signed-off-by: Koichiro Den <[email protected]>
> > > > ---
> > > ...
> > > > +	 */
> > > > +	if (doorbell->bar == NO_BAR) {
> > > > +		phys_base = addr & PAGE_MASK;
> > > > +		off = addr - phys_base;
> > > > +		map_size = PAGE_ALIGN(off + sizeof(u32));
> > > > +
> > > > +		iova_base = dma_map_resource(epc->dev.parent, phys_base,
> > > > +					     map_size, DMA_FROM_DEVICE, 0);
> > > 
> > > DB should write. Is it DMA_TO_DEVICE?
> > 
> > Thanks for reviewing.
> > 
> > The write is initiated by the peer (RC) and lands in this EP-side doorbell
> > target, so from the EP side this is a DMA_FROM_DEVICE mapping.
> 
> I don't understand.
> 
> If the RC side does a PCI TLP write, the iATU on the EP side should translate
> that to an AXI write, no?

Yes.

> 
> If the target address (doorbell register in this case) is only mapped as a
> DMA_FROM_DEVICE (read), I would have expected that AXI write to result in an
> IOMMU fault.

My understanding is that the inbound MWr becomes a local write on the EP side.
Here, the EP controller needs write permission to the doorbell target, so
DMA_FROM_DEVICE is intentional.

As noted in the cover letter, IOMMU coverage was tested.

> 
> Is the IOMMU really running in strict mode and not in passthrough mode on
> your platform?
> 
> Do you get an IOMMU fault if you change this code to DMA_TO_DEVICE ?

Yes, changing it to DMA_TO_DEVICE triggers an IOMMU fault. I've confirmed this
experimentally. This also indicates that it's not passthrough for this mapping
on my setup.

Best regards,
Koichiro

> 
> 
> Kind regards,
> Niklas