[PATCH v14 2/7] PCI: dwc: Record integrated eDMA register window
Koichiro Den <[email protected]> Tue, 14 Apr 2026 23:15:09 +0900
| Newsgroups | dev.linux.lists.ntb,org.kernel.vger.linux-kernel,org.kernel.vger.linux-pci |
|---|---|
| Message-ID | <[email protected]> |
Some DesignWare PCIe controllers integrate an eDMA block whose registers are located in a dedicated register window. The EP-side aux-resource code exposes an interrupt-emulation doorbell register (DOORBELL_MMIO) from that window. Its location is derived from the start of the eDMA register window plus the doorbell offset already provided by dw-edma, and the window size is used to validate the computed register location. Record the physical base and size of the integrated eDMA register window in struct dw_pcie so the EP-side DesignWare aux-resource provider can construct that doorbell resource. Reviewed-by: Frank Li <[email protected]> Tested-by: Niklas Cassel <[email protected]> Signed-off-by: Koichiro Den <[email protected]> --- drivers/pci/controller/dwc/pcie-designware.c | 4 ++++ drivers/pci/controller/dwc/pcie-designware.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 5741c09dde7f..f82ed189f6ae 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -162,8 +162,12 @@ int dw_pcie_get_resources(struct dw_pcie *pci) pci->edma.reg_base = devm_ioremap_resource(pci->dev, res); if (IS_ERR(pci->edma.reg_base)) return PTR_ERR(pci->edma.reg_base); + pci->edma_reg_phys = res->start; + pci->edma_reg_size = resource_size(res); } else if (pci->atu_size >= 2 * DEFAULT_DBI_DMA_OFFSET) { pci->edma.reg_base = pci->atu_base + DEFAULT_DBI_DMA_OFFSET; + pci->edma_reg_phys = pci->atu_phys_addr + DEFAULT_DBI_DMA_OFFSET; + pci->edma_reg_size = pci->atu_size - DEFAULT_DBI_DMA_OFFSET; } } diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index ae6389dd9caa..52f26663e8b1 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -541,6 +541,8 @@ struct dw_pcie { int max_link_speed; u8 n_fts[2]; struct dw_edma_chip edma; + phys_addr_t edma_reg_phys; + resource_size_t edma_reg_size; bool l1ss_support; /* L1 PM Substates support */ struct clk_bulk_data app_clks[DW_PCIE_NUM_APP_CLKS]; struct clk_bulk_data core_clks[DW_PCIE_NUM_CORE_CLKS]; -- 2.51.0