Re: [PATCH v12 6/8] cxl/mem: Configure dynamic capacity interrupts

Anisa Su <[email protected]>
Newsgroups dev.linux.lists.nvdimm,dev.linux.lists.sashiko-reviews,org.kernel.vger.linux-cxl
Message-ID <anUYX0t32y37vfyR@cxlqual>
On Mon, Aug 03, 2026 at 05:25:04PM -0700, Alison Schofield wrote:
> On Sat, Aug 01, 2026 at 02:30:24AM -0700, Anisa Su wrote:
> > On Fri, Jul 31, 2026 at 09:04:43AM +0000, [email protected] wrote:
> > > Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
> > > 
> > > New issues:
> > > - [High] Infinite IRQ Thread Loop / CPU Spin when handling DCD events
> > > 
> > False Positive. DCD events are ignored because DCD is turned off
> > (mds->dcd_supported = false).
> 
> Hi Anisa,
> 
> I have related review feedback -
> 
> 
> snip
> 
> > > 
> > > [Severity: High]
> > > Since mask now includes CXLDEV_EVENT_STATUS_DCD, status can have this bit set.
> > > However, cxl_mem_get_event_records() does not appear to handle the DCD event:
> > > 
> > The mask never includes CXLDEV_EVENT_STATUS_DCD.
> > Above in cxl_event_drain_mask:
> > 
> > if (cxl_dcd_supported(mds))
> >               mask |= CXLDEV_EVENT_STATUS_DCD;
> > 
> > mds->dcd_supported is set to false in Patch 1 so the DCD bit is never
> > set.
> > 
> > So status &= mask becomes zero and we break from the loop.
> > 
> > - Anisa
> 
> I understand that dcd_supported being forced false makes this unreachable
> today. My concern is that this patch adds the DCD bit to the drain path
> before there is code to consume and clear that log.
> 
> As soon as a later patch enables dcd_supported, the bit can enter status
> and the handler can loop without clearing it. Could the DCD bit be added
> to the mask in the same patch that adds the DCD drain handling?
> 
> -- Alison

Sure, that makes sense.

cxl_event_drain_mask() no longer sets the DCD bit, and it
loses the mds argument it needed for checking cxl_dcd_supported() to set it:

	/* Event logs the driver drains: standard logs when native_cxl */
	static u32 cxl_event_drain_mask(struct pci_host_bridge *host_bridge)
	{
		if (host_bridge->native_cxl_error)
			return CXLDEV_EVENT_STATUS_ALL & ~CXLDEV_EVENT_STATUS_DCD;
		return 0;
	}

The bit is added back by "cxl/mem: Set up framework for handling DC
Events", the patch that adds the DCD case to
cxl_mem_get_event_records(), so the mask and its consumer arrive
together.

The commit message is updated to make it clear that the DCD event log
is not drained in this patch:

    The DCD event log is not drained here.  cxl_event_drain_mask() reports
    only the logs the driver can service, and the DCD bit is added by
    the patch introducing DCD event handling.  Until then a DCD interrupt
    wakes the event thread, which finds no log it owns and returns.

Thanks,
Anisa
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