[linux-next:master 6206/7584] arch/riscv/include/asm/pgtable.h:584:47: error: variable 'asid' is uninitialized when used here

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head:   0718283ab28bc3907e10b61a6b4be6fefa1cbb2f
commit: 6dfbb04908eb630ae6a592454b28c2f666a20a5a [6206/7584] riscv: mm: Apply Svinval in update_mmu_cache()
config: riscv-randconfig-r063-20260718 (https://download.01.org/0day-ci/archive/20260719/[email protected]/config)
compiler: clang version 24.0.0git (https://github.com/llvm/llvm-project 5c0dfced1adc55429e32b1db08570abd3a219d85)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260719/[email protected]/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/

All errors (new ones prefixed by >>):

   In file included from lib/test_bitops.c:10:
   In file included from include/linux/module.h:20:
   In file included from include/linux/elf.h:6:
   In file included from arch/riscv/include/asm/elf.h:12:
   In file included from include/linux/compat.h:17:
   In file included from include/linux/fs.h:5:
   In file included from include/linux/fs/super.h:5:
   In file included from include/linux/fs/super_types.h:13:
   In file included from include/linux/percpu-rwsem.h:7:
   In file included from include/linux/rcuwait.h:6:
   In file included from include/linux/sched/signal.h:9:
   In file included from include/linux/sched/task.h:13:
   In file included from include/linux/uaccess.h:13:
   In file included from arch/riscv/include/asm/uaccess.h:13:
>> arch/riscv/include/asm/pgtable.h:584:47: error: variable 'asid' is uninitialized when used here [-Werror,-Wuninitialized]
     584 |                         local_sinval_vma(address + nr * PAGE_SIZE, asid);
         |                                                                    ^~~~
   arch/riscv/include/asm/pgtable.h:571:20: note: initialize the variable 'asid' to silence this warning
     571 |         unsigned long asid;
         |                           ^
         |                            = 0
   1 error generated.


vim +/asid +584 arch/riscv/include/asm/pgtable.h

   561	
   562	#define pgd_ERROR(e) \
   563		pr_err("%s:%d: bad pgd " PTE_FMT ".\n", __FILE__, __LINE__, pgd_val(e))
   564	
   565	
   566	/* Commit new configuration to MMU hardware */
   567	static inline void update_mmu_cache_range(struct vm_fault *vmf,
   568			struct vm_area_struct *vma, unsigned long address,
   569			pte_t *ptep, unsigned int nr)
   570	{
   571		unsigned long asid;
   572	
   573		/*
   574		 * Svvptc guarantees that the new valid pte will be visible within
   575		 * a bounded timeframe, so when the uarch does not cache invalid
   576		 * entries, we don't have to do anything.
   577		 */
   578		if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SVVPTC))
   579			return;
   580	
   581		if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SVINVAL)) {
   582			local_sfence_w_inval();
   583			while (nr--)
 > 584				local_sinval_vma(address + nr * PAGE_SIZE, asid);
   585			local_sfence_inval_ir();
   586			return;
   587		}
   588	
   589		/*
   590		 * The kernel assumes that TLBs don't cache invalid entries, but
   591		 * in RISC-V, SFENCE.VMA specifies an ordering constraint, not a
   592		 * cache flush; it is necessary even after writing invalid entries.
   593		 * Relying on flush_tlb_fix_spurious_fault would suffice, but
   594		 * the extra traps reduce performance.  So, eagerly SFENCE.VMA.
   595		 */
   596		asid = get_mm_asid(vma->vm_mm);
   597		while (nr--)
   598			local_flush_tlb_page_asid(address + nr * PAGE_SIZE, asid);
   599	}
   600	

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