[thermal:thermal/linux-next 2/26] drivers/thermal/armada_thermal.c:137:9: error: implicit declaration of function 'FIELD_MODIFY'

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git thermal/linux-next
head:   55c16e15ff9f91bc994a20124b83faf27f0e3690
commit: cbe31d5ce49873a2a5a3ca5decb4935672396e77 [2/26] thermal/drivers/armada: Use bitfield and bitmask macros
config: powerpc-allmodconfig (https://download.01.org/0day-ci/archive/20260808/[email protected]/config)
compiler: powerpc64-linux-gcc (GCC) 16.1.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260808/[email protected]/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/

All errors (new ones prefixed by >>):

   drivers/thermal/armada_thermal.c: In function 'armadaxp_init':
>> drivers/thermal/armada_thermal.c:137:9: error: implicit declaration of function 'FIELD_MODIFY' [-Wimplicit-function-declaration]
     137 |         FIELD_MODIFY(PMU_TDC0_OTF_CAL_MASK, &reg, 1);
         |         ^~~~~~~~~~~~
   drivers/thermal/armada_thermal.c: In function 'armada_ap80x_init':
>> drivers/thermal/armada_thermal.c:43:41: error: implicit declaration of function 'FIELD_MAX' [-Wimplicit-function-declaration]
      43 | #define CONTROL0_TSEN_OSR_MAX           FIELD_MAX(CONTROL0_TSEN_OSR_MASK)
         |                                         ^~~~~~~~~
   drivers/thermal/armada_thermal.c:236:52: note: in expansion of macro 'CONTROL0_TSEN_OSR_MAX'
     236 |         FIELD_MODIFY(CONTROL0_TSEN_OSR_MASK, &reg, CONTROL0_TSEN_OSR_MAX);
         |                                                    ^~~~~~~~~~~~~~~~~~~~~


vim +/FIELD_MODIFY +137 drivers/thermal/armada_thermal.c

    36	
    37	#define CONTROL0_TSEN_START		BIT(0)
    38	#define CONTROL0_TSEN_RESET		BIT(1)
    39	#define CONTROL0_TSEN_ENABLE		BIT(2)
    40	#define CONTROL0_TSEN_AVG_BYPASS	BIT(6)
    41	#define CONTROL0_TSEN_CHAN_MASK		GENMASK(16, 13)
    42	#define CONTROL0_TSEN_OSR_MASK		GENMASK(25, 24)
  > 43	#define CONTROL0_TSEN_OSR_MAX		FIELD_MAX(CONTROL0_TSEN_OSR_MASK)
    44	#define CONTROL0_TSEN_MODE_MASK		GENMASK(31, 30)
    45	#define CONTROL0_TSEN_MODE_EXTERNAL	0x2
    46	
    47	#define CONTROL1_TSEN_AVG_MASK		GENMASK(2, 0)
    48	#define CONTROL1_EXT_TSEN_SW_RESET	BIT(7)
    49	#define CONTROL1_EXT_TSEN_HW_RESETn	BIT(8)
    50	#define CONTROL1_TSEN_INT_EN		BIT(25)
    51	#define CONTROL1_TSEN_SELECT_MASK	GENMASK(22, 21)
    52	
    53	#define STATUS_POLL_PERIOD_US		1000
    54	#define STATUS_POLL_TIMEOUT_US		100000
    55	#define OVERHEAT_INT_POLL_DELAY_MS	1000
    56	
    57	struct armada_thermal_data;
    58	
    59	/* Marvell EBU Thermal Sensor Dev Structure */
    60	struct armada_thermal_priv {
    61		struct device *dev;
    62		struct regmap *syscon;
    63		char zone_name[THERMAL_NAME_LENGTH];
    64		/* serialize temperature reads/updates */
    65		struct mutex update_lock;
    66		struct armada_thermal_data *data;
    67		struct thermal_zone_device *overheat_sensor;
    68		int interrupt_source;
    69		int current_channel;
    70		long current_threshold;
    71		long current_hysteresis;
    72	};
    73	
    74	struct armada_thermal_data {
    75		/* Initialize the thermal IC */
    76		void (*init)(struct platform_device *pdev,
    77			     struct armada_thermal_priv *priv);
    78	
    79		/* Formula coeficients: temp = (b - m * reg) / div */
    80		s64 coef_b;
    81		s64 coef_m;
    82		u32 coef_div;
    83		bool inverted;
    84		bool signed_sample;
    85	
    86		/* Register shift and mask to access the sensor temperature */
    87		unsigned int temp_shift;
    88		unsigned int temp_mask;
    89		unsigned int thresh_shift;
    90		unsigned int hyst_shift;
    91		unsigned int hyst_mask;
    92		u32 is_valid_bit;
    93	
    94		/* Syscon access */
    95		unsigned int syscon_control0_off;
    96		unsigned int syscon_control1_off;
    97		unsigned int syscon_status_off;
    98		unsigned int dfx_irq_cause_off;
    99		unsigned int dfx_irq_mask_off;
   100		unsigned int dfx_overheat_irq;
   101		unsigned int dfx_server_irq_mask_off;
   102		unsigned int dfx_server_irq_en;
   103	
   104		/* One sensor is in the thermal IC, the others are in the CPUs if any */
   105		unsigned int cpu_nr;
   106	};
   107	
   108	struct armada_drvdata {
   109		enum drvtype {
   110			LEGACY,
   111			SYSCON
   112		} type;
   113		union {
   114			struct armada_thermal_priv *priv;
   115			struct thermal_zone_device *tz;
   116		} data;
   117	};
   118	
   119	/*
   120	 * struct armada_thermal_sensor - hold the information of one thermal sensor
   121	 * @thermal: pointer to the local private structure
   122	 * @tzd: pointer to the thermal zone device
   123	 * @id: identifier of the thermal sensor
   124	 */
   125	struct armada_thermal_sensor {
   126		struct armada_thermal_priv *priv;
   127		int id;
   128	};
   129	
   130	static void armadaxp_init(struct platform_device *pdev,
   131				  struct armada_thermal_priv *priv)
   132	{
   133		struct armada_thermal_data *data = priv->data;
   134		u32 reg;
   135	
   136		regmap_read(priv->syscon, data->syscon_control1_off, &reg);
 > 137		FIELD_MODIFY(PMU_TDC0_OTF_CAL_MASK, &reg, 1);
   138	
   139		/* Reference calibration value */
   140		FIELD_MODIFY(PMU_TDC0_REF_CAL_CNT_MASK, &reg, 0xf1);
   141	
   142		/* Reset the sensor */
   143		FIELD_MODIFY(PMU_TDC0_SW_RST_MASK, &reg, 1);
   144		regmap_write(priv->syscon, data->syscon_control1_off, reg);
   145	
   146		FIELD_MODIFY(PMU_TDC0_SW_RST_MASK, &reg, 0);
   147		regmap_write(priv->syscon, data->syscon_control1_off, reg);
   148	
   149		/* Enable the sensor */
   150		regmap_read(priv->syscon, data->syscon_status_off, &reg);
   151		FIELD_MODIFY(PMU_TM_DISABLE_MASK, &reg, 0);
   152		regmap_write(priv->syscon, data->syscon_status_off, reg);
   153	}
   154	

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