drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c:1316:4-22: opportunity for str_true_false(ring -> use_doorbell)

BCC: [email protected]
CC: [email protected]
CC: [email protected]
TO: Likun Gao <[email protected]>
CC: Alex Deucher <[email protected]>

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   d2c9a99135da931377240942d44f3dea104cedb8
commit: 4ed5116aacf6126ef9c7bc8cd7367ed6797e5c8f drm/amdgpu: Add sdma v7_1_0 support
date:   7 months ago
:::::: branch date: 10 hours ago
:::::: commit date: 7 months ago
config: loongarch-randconfig-r062-20260703 (https://download.01.org/0day-ci/archive/20260704/[email protected]/config)
compiler: loongarch64-linux-gcc (GCC) 16.1.0

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Fixes: 4ed5116aacf6 ("drm/amdgpu: Add sdma v7_1_0 support")
| Reported-by: kernel test robot <[email protected]>
| Reported-by: Julia Lawall <[email protected]>
| Closes: https://lore.kernel.org/r/[email protected]/

cocci warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c:1316:4-22: opportunity for str_true_false(ring -> use_doorbell)

vim +1316 drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

4ed5116aacf612 Likun Gao 2025-01-07  1290  
4ed5116aacf612 Likun Gao 2025-01-07  1291  static int sdma_v7_1_sw_init(struct amdgpu_ip_block *ip_block)
4ed5116aacf612 Likun Gao 2025-01-07  1292  {
4ed5116aacf612 Likun Gao 2025-01-07  1293  	struct amdgpu_ring *ring;
4ed5116aacf612 Likun Gao 2025-01-07  1294  	int r, i;
4ed5116aacf612 Likun Gao 2025-01-07  1295  	struct amdgpu_device *adev = ip_block->adev;
4ed5116aacf612 Likun Gao 2025-01-07  1296  	uint32_t reg_count = ARRAY_SIZE(sdma_reg_list_7_1);
4ed5116aacf612 Likun Gao 2025-01-07  1297  	uint32_t *ptr;
4ed5116aacf612 Likun Gao 2025-01-07  1298  	u32 xcc_id;
4ed5116aacf612 Likun Gao 2025-01-07  1299  
4ed5116aacf612 Likun Gao 2025-01-07  1300  	/* SDMA trap event */
4ed5116aacf612 Likun Gao 2025-01-07  1301  	r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_GFX,
4ed5116aacf612 Likun Gao 2025-01-07  1302  			      GFX_11_0_0__SRCID__SDMA_TRAP,
4ed5116aacf612 Likun Gao 2025-01-07  1303  			      &adev->sdma.trap_irq);
4ed5116aacf612 Likun Gao 2025-01-07  1304  	if (r)
4ed5116aacf612 Likun Gao 2025-01-07  1305  		return r;
4ed5116aacf612 Likun Gao 2025-01-07  1306  
4ed5116aacf612 Likun Gao 2025-01-07  1307  	for (i = 0; i < adev->sdma.num_instances; i++) {
4ed5116aacf612 Likun Gao 2025-01-07  1308  		ring = &adev->sdma.instance[i].ring;
4ed5116aacf612 Likun Gao 2025-01-07  1309  		ring->ring_obj = NULL;
4ed5116aacf612 Likun Gao 2025-01-07  1310  		ring->use_doorbell = true;
4ed5116aacf612 Likun Gao 2025-01-07  1311  		ring->me = i;
4ed5116aacf612 Likun Gao 2025-01-07  1312  		xcc_id = adev->sdma.instance[i].xcc_id;
4ed5116aacf612 Likun Gao 2025-01-07  1313  
4ed5116aacf612 Likun Gao 2025-01-07  1314  		DRM_DEBUG("SDMA%d.%d use_doorbell being set to: [%s]\n",
4ed5116aacf612 Likun Gao 2025-01-07  1315  				xcc_id, i % adev->sdma.num_inst_per_xcc,
4ed5116aacf612 Likun Gao 2025-01-07 @1316  				ring->use_doorbell?"true":"false");
4ed5116aacf612 Likun Gao 2025-01-07  1317  
4ed5116aacf612 Likun Gao 2025-01-07  1318  		ring->doorbell_index =
4ed5116aacf612 Likun Gao 2025-01-07  1319  			(adev->doorbell_index.sdma_engine[i] << 1); // get DWORD offset
4ed5116aacf612 Likun Gao 2025-01-07  1320  
4ed5116aacf612 Likun Gao 2025-01-07  1321  		ring->vm_hub = AMDGPU_GFXHUB(xcc_id);
4ed5116aacf612 Likun Gao 2025-01-07  1322  		sprintf(ring->name, "sdma%d.%d", xcc_id,
4ed5116aacf612 Likun Gao 2025-01-07  1323  				i % adev->sdma.num_inst_per_xcc);
4ed5116aacf612 Likun Gao 2025-01-07  1324  		r = amdgpu_ring_init(adev, ring, 1024,
4ed5116aacf612 Likun Gao 2025-01-07  1325  				     &adev->sdma.trap_irq,
4ed5116aacf612 Likun Gao 2025-01-07  1326  				     AMDGPU_SDMA_IRQ_INSTANCE0 + i,
4ed5116aacf612 Likun Gao 2025-01-07  1327  				     AMDGPU_RING_PRIO_DEFAULT, NULL);
4ed5116aacf612 Likun Gao 2025-01-07  1328  		if (r)
4ed5116aacf612 Likun Gao 2025-01-07  1329  			return r;
4ed5116aacf612 Likun Gao 2025-01-07  1330  	}
4ed5116aacf612 Likun Gao 2025-01-07  1331  
4ed5116aacf612 Likun Gao 2025-01-07  1332  	adev->sdma.supported_reset =
4ed5116aacf612 Likun Gao 2025-01-07  1333  		amdgpu_get_soft_full_reset_mask(&adev->sdma.instance[0].ring);
4ed5116aacf612 Likun Gao 2025-01-07  1334  	if (!amdgpu_sriov_vf(adev) &&
4ed5116aacf612 Likun Gao 2025-01-07  1335  	    !adev->debug_disable_gpu_ring_reset)
4ed5116aacf612 Likun Gao 2025-01-07  1336  		adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
4ed5116aacf612 Likun Gao 2025-01-07  1337  
4ed5116aacf612 Likun Gao 2025-01-07  1338  	r = amdgpu_sdma_sysfs_reset_mask_init(adev);
4ed5116aacf612 Likun Gao 2025-01-07  1339  	if (r)
4ed5116aacf612 Likun Gao 2025-01-07  1340  		return r;
4ed5116aacf612 Likun Gao 2025-01-07  1341  	/* Allocate memory for SDMA IP Dump buffer */
4ed5116aacf612 Likun Gao 2025-01-07  1342  	ptr = kcalloc(adev->sdma.num_instances * reg_count, sizeof(uint32_t), GFP_KERNEL);
4ed5116aacf612 Likun Gao 2025-01-07  1343  	if (ptr)
4ed5116aacf612 Likun Gao 2025-01-07  1344  		adev->sdma.ip_dump = ptr;
4ed5116aacf612 Likun Gao 2025-01-07  1345  	else
4ed5116aacf612 Likun Gao 2025-01-07  1346  		DRM_ERROR("Failed to allocated memory for SDMA IP Dump\n");
4ed5116aacf612 Likun Gao 2025-01-07  1347  

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