drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c:2342 gfx_v12_1_xcc_kcq_resume() error: buffer overflow 'adev->gfx.compute_ring' 64 <= u32max

kernel test robot <[email protected]>
Newsgroups dev.linux.lists.oe-kbuild
Message-ID <[email protected]>
BCC: [email protected]
CC: [email protected]
CC: [email protected]
TO: Likun Gao <[email protected]>
CC: Alex Deucher <[email protected]>
CC: Hawking Zhang <[email protected]>
CC: Mukul Joshi <[email protected]>

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   bcc44b6785f216eb939226ade6e3910baa30516b
commit: ad5f1ee0a9b03200b86db65fd946b686088b4b03 drm/amdgpu: Add initial support for gfx v12_1
date:   8 months ago
:::::: branch date: 18 hours ago
:::::: commit date: 8 months ago
config: i386-randconfig-141-20260806 (https://download.01.org/0day-ci/archive/20260809/[email protected]/config)
compiler: clang version 22.1.3 (https://github.com/llvm/llvm-project e9846648fd6183ee6d8cbdb4502213fcf902a211)
smatch: v0.5.0-9187-g5189e3fb

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Fixes: ad5f1ee0a9b0 ("drm/amdgpu: Add initial support for gfx v12_1")
| Reported-by: kernel test robot <[email protected]>
| Reported-by: Dan Carpenter <[email protected]>
| Closes: https://lore.kernel.org/r/[email protected]/

smatch warnings:
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c:2342 gfx_v12_1_xcc_kcq_resume() error: buffer overflow 'adev->gfx.compute_ring' 64 <= u32max
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c:2397 gfx_v12_1_xcc_cp_resume() error: buffer overflow 'adev->gfx.compute_ring' 64 <= u32max
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c:3723 gfx_v12_1_set_ring_funcs() error: buffer overflow 'adev->gfx.compute_ring' 64 <= u32max

vim +2342 drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

ad5f1ee0a9b0320 Likun Gao 2025-02-17  2331  
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2332  static int gfx_v12_1_xcc_kcq_resume(struct amdgpu_device *adev,
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2333  				    int xcc_id)
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2334  {
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2335  	struct amdgpu_ring *ring = NULL;
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2336  	int r = 0, i;
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2337  
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2338  	if (!amdgpu_async_gfx_ring)
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2339  		gfx_v12_1_xcc_cp_compute_enable(adev, true, xcc_id);
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2340  
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2341  	for (i = 0; i < adev->gfx.num_compute_rings; i++) {
ad5f1ee0a9b0320 Likun Gao 2025-02-17 @2342  		ring = &adev->gfx.compute_ring[i + xcc_id * adev->gfx.num_compute_rings];
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2343  
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2344  		r = amdgpu_bo_reserve(ring->mqd_obj, false);
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2345  		if (unlikely(r != 0))
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2346  			goto done;
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2347  		r = amdgpu_bo_kmap(ring->mqd_obj, (void **)&ring->mqd_ptr);
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2348  		if (!r) {
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2349  			r = gfx_v12_1_xcc_kcq_init_queue(ring, xcc_id);
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2350  			amdgpu_bo_kunmap(ring->mqd_obj);
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2351  			ring->mqd_ptr = NULL;
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2352  		}
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2353  		amdgpu_bo_unreserve(ring->mqd_obj);
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2354  		if (r)
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2355  			goto done;
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2356  	}
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2357  
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2358  	r = amdgpu_gfx_enable_kcq(adev, xcc_id);
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2359  done:
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2360  	return r;
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2361  }
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2362  
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2363  static int gfx_v12_1_xcc_cp_resume(struct amdgpu_device *adev,
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2364  				   int xcc_id)
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2365  {
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2366  	int r, i;
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2367  	struct amdgpu_ring *ring;
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2368  
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2369  	if (!(adev->flags & AMD_IS_APU))
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2370  		gfx_v12_1_xcc_enable_gui_idle_interrupt(adev, false, xcc_id);
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2371  
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2372  	if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) {
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2373  		/* legacy firmware loading */
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2374  		r = gfx_v12_1_xcc_cp_compute_load_microcode_rs64(adev, xcc_id);
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2375  		if (r)
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2376  			return r;
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2377  	}
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2378  
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2379  	gfx_v12_1_xcc_cp_set_doorbell_range(adev, xcc_id);
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2380  
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2381  	if (amdgpu_async_gfx_ring) {
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2382  		gfx_v12_1_xcc_cp_compute_enable(adev, true, xcc_id);
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2383  	}
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2384  
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2385  	if (adev->enable_mes_kiq && adev->mes.kiq_hw_init)
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2386  		r = amdgpu_mes_kiq_hw_init(adev, xcc_id);
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2387  	else
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2388  		r = gfx_v12_1_xcc_kiq_resume(adev, xcc_id);
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2389  	if (r)
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2390  		return r;
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2391  
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2392  	r = gfx_v12_1_xcc_kcq_resume(adev, xcc_id);
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2393  	if (r)
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2394  		return r;
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2395  
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2396  	for (i = 0; i < adev->gfx.num_compute_rings; i++) {
ad5f1ee0a9b0320 Likun Gao 2025-02-17 @2397  		ring = &adev->gfx.compute_ring[i + xcc_id * adev->gfx.num_compute_rings];
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2398  		r = amdgpu_ring_test_helper(ring);
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2399  		if (r)
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2400  			return r;
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2401  	}
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2402  
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2403  	return 0;
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2404  }
ad5f1ee0a9b0320 Likun Gao 2025-02-17  2405  

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