Re: [PATCH v2 3/8] iommu/arm-smmu-v3: Optimize range invalidation for latency

On Fri, Aug 14, 2026 at 09:39:16AM +0100, Will Deacon wrote:

> > Let me try it, it seems like it would make everyone happy.
> 
> I was planning to reply yesterday saying something like "Robin previously
> mentioned this one neat trick...", but I didn't get round to it. So yeah,
> if we can implement that, I think we can have one range invalidation
> algorithm to rule them all.

I'm working through it and unfortunately it brings back the CONT
errata issue. This version nicely solves that errata because there is
one RIL that always spans any CONT group.

When we have two RIL it becomes problematic as we can no longer
guarentee that a single RIL fully spans an entire CONT.

I'm also wondering if we are even OK with this errata today? The
current RIL algorithm also does not guarentee the split up RILs will
cover every CONT. This will happen to be true if the input range has
certain properties but I have no idea if the SVA path or even the
proposed CONT iopgtable change guarentees that.

Certainly iommupt will not.

So, if we disable CONT and SVA if this errata is present would anyone
object?

Jason