Re: [REGRESSION][BISECTED] stmmac: suspend hangs since 1b9707e6f1a9 ("net: stmmac: enable RPS and RBU interrupts")

tresonic <[email protected]> Fri, 17 Jul 2026 09:18:55 +0200
Newsgroups dev.linux.lists.regressions,org.kernel.vger.netdev
Message-ID <[email protected]>
On 7/16/26 11:47 PM, Andrew Lunn wrote:
> On Thu, Jul 16, 2026 at 10:10:25PM +0200, tresonic wrote:
>> Hello,
>> Please bear with me, this is my first time writing to a mailing list...
> 
> Thanks for the report. Nice description for a first post. Lots of
> useful details.
> 
>> Since commit 1b9707e6f1a9, suspend (systemctl suspend) causes a full system freeze on my laptop. Fans and keyboard backlight stay powered; the machine is completely unresponsive and requires a hard power-off (holding the power button) to recover. I could not get any kernel output from the hang.
> 
> 1b9707e6f1a9 makes in effect 4 changes.
> 
> Can you do some testing to see if the changes to
> DMA_CHAN_INTR_ABNORMAL or the changes to DMA_CHAN_INTR_ABNORMAL_4_10
> break it. Or both, but i think that is unlikely.
> 
> Once you know which of those is responsible, can you test to see which
> of DMA_CHAN_INTR_ENA_RPS or DMA_CHAN_INTR_ENA_RBU broke it.
> 
> It kind of sounds like an interrupt storm, but that is just a
> guess. If it is an interrupt storm, it suggests an interrupt is not
> being disabled during suspend.
> 
>    Andrew

I tested the changes as you suggested and it seems DMA_CHAN_INTR_ENA_RPS in DMA_CHAN_INTR_ABNORMAL_4_10 broke it.
With this change on master suspend is working:

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h
index 43b036d4e95b..e907142c9ee2 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h
@@ -121,7 +121,6 @@ static inline u32 dma_chanx_base_addr(const struct dwmac4_addrs *addrs,
                                         DMA_CHAN_INTR_ENA_TIE)
 
 #define DMA_CHAN_INTR_ABNORMAL_4_10    (DMA_CHAN_INTR_ENA_AIE_4_10 | \
-                                        DMA_CHAN_INTR_ENA_RPS | \
                                         DMA_CHAN_INTR_ENA_RBU | \
                                         DMA_CHAN_INTR_ENA_FBE)
 /* DMA default interrupt mask for 4.10a */

tresonic